[llvm] r358171 - [AArch64] Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64
Diogo N. Sampaio via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 11 07:19:43 PDT 2019
Author: dnsampaio
Date: Thu Apr 11 07:19:43 2019
New Revision: 358171
URL: http://llvm.org/viewvc/llvm-project?rev=358171&view=rev
Log:
[AArch64] Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64
Summary: Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64
Reviewers: pbarrio, DavidSpickett, LukeGeeson
Reviewed By: LukeGeeson
Subscribers: javed.absar, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60259
Modified:
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td?rev=358171&r1=358170&r2=358171&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td Thu Apr 11 07:19:43 2019
@@ -5327,6 +5327,8 @@ def : Pat<(f16 (int_aarch64_neon_vcvtfxs
(SCVTFh (EXTRACT_SUBREG FPR32:$Rn, hsub), vecshiftR16:$imm)>;
def : Pat<(f16 (int_aarch64_neon_vcvtfxs2fp (i32 FPR32:$Rn), vecshiftR16:$imm)),
(SCVTFh (EXTRACT_SUBREG FPR32:$Rn, hsub), vecshiftR16:$imm)>;
+def : Pat<(f16 (int_aarch64_neon_vcvtfxs2fp (i64 FPR64:$Rn), vecshiftR16:$imm)),
+ (SCVTFh (EXTRACT_SUBREG FPR64:$Rn, hsub), vecshiftR16:$imm)>;
def : Pat<(f16 (int_aarch64_neon_vcvtfxu2fp
(and FPR32:$Rn, (i32 65535)),
vecshiftR16:$imm)),
Modified: llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll?rev=358171&r1=358170&r2=358171&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll Thu Apr 11 07:19:43 2019
@@ -342,3 +342,13 @@ entry:
%0 = trunc i32 %facg to i16
ret i16 %0
}
+
+define dso_local half @vcvth_n_f16_s64_test(i64 %a) {
+; CHECK-LABEL: vcvth_n_f16_s64_test:
+; CHECK: fmov d0, x0
+; CHECK-NEXT: scvtf h0, h0, #16
+; CHECK-NEXT: ret
+entry:
+ %vcvth_n_f16_s64 = tail call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i64(i64 %a, i32 16)
+ ret half %vcvth_n_f16_s64
+}
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