[PATCH] D60460: [SelectionDAG] Use KnownBits::computeForAddSub in SelectionDAG::computeKnownBits

[Bjorn Pettersson via Phabricator via llvm-commits]

bjope marked an inline comment as done.
bjope added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2929
   case ISD::ADD:
   case ISD::ADDC:
   case ISD::ADDE: {
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Am I missing something, or isn't ADDC and ADDE producing multiple results (just like ADDCARRY etc above)?
So isn't it necessary to check if we are tracking the result of getResNo()==0 or getResNo()=1 also for ADDC and ADDE?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D60460/new/

https://reviews.llvm.org/D60460