[llvm] r358124 - [X86] Add test case for LEA formation regression seen with D60358. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 10 12:09:06 PDT 2019


Author: ctopper
Date: Wed Apr 10 12:09:06 2019
New Revision: 358124

URL: http://llvm.org/viewvc/llvm-project?rev=358124&view=rev
Log:
[X86] Add test case for LEA formation regression seen with D60358. NFC

If we have an (add X, (and (aext (shl Y, C1)), C2)), we can pull the shift through and+aext to fold into an LEA with the.
Assuming C1 is small enough and C2 masks off all of the extend bits.

This pattern showed up in D60358. And we need to handle it to prevent a regression.

Modified:
    llvm/trunk/test/CodeGen/X86/fold-and-shift-x86_64.ll

Modified: llvm/trunk/test/CodeGen/X86/fold-and-shift-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-and-shift-x86_64.ll?rev=358124&r1=358123&r2=358124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-and-shift-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-and-shift-x86_64.ll Wed Apr 10 12:09:06 2019
@@ -75,3 +75,22 @@ entry:
   %tmp9 = load i8, i8* %tmp7
   ret i8 %tmp9
 }
+
+; FIXME should be able to fold shift into address.
+define i8 @t6(i8* %X, i32 %i) {
+; CHECK-LABEL: t6:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
+; CHECK-NEXT:    shll $2, %esi
+; CHECK-NEXT:    andl $60, %esi
+; CHECK-NEXT:    movb (%rdi,%rsi), %al
+; CHECK-NEXT:    retq
+entry:
+  %tmp2 = shl i32 %i, 2
+  %tmp3 = zext i32 %tmp2 to i64
+  %tmp4 = and i64 %tmp3, 60
+  %tmp7 = getelementptr i8, i8* %X, i64 %tmp4
+  %tmp9 = load i8, i8* %tmp7
+  ret i8 %tmp9
+}
+




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