[PATCH] D59626: [AMDGPU] Add MachineDCE pass after RenameIndependentSubregs

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D59626#1458594 <https://reviews.llvm.org/D59626#1458594>, @rampitec wrote:

> > - I get MachineVerifier problems because the LIS update does not update live ranges for physical registers. Consider an instruction like this `dead %42:regs = COPY $a1`, if that is removed and it is the last use of the physical register `$a1` then we need to shrink the live range for `$a1` , otherwise the MachineVerifier will complain about "Live segment doesn't end at a valid instruction".


Actually I cannot reproduce it:

  # RUN: llc -march=amdgcn -mcpu=tonga %s -run-pass liveintervals,dead-mi-elimination -verify-machineinstrs -o - | FileCheck -check-prefix=GCN %s
    
  ---
  name:            dead_phys_use
  tracksRegLiveness: true
  liveins:
    - { reg: '$vgpr0', virtual-reg: '%2' }
  body:             |
    bb.0:
      liveins: $vgpr0
  
      %2:vgpr_32 = COPY $vgpr0
      $vgpr1 = COPY %2:vgpr_32
      %1:vgpr_32 = COPY $vgpr0, implicit $exec
      SI_RETURN_TO_EPILOG $vgpr1
  ...

The last COPY is dead and $vgpr0 will be affected, but verifier did not find any errors:

  bb.0:
    liveins: $vgpr0
  
    %0:vgpr_32 = COPY $vgpr0
    $vgpr1 = COPY %0
    SI_RETURN_TO_EPILOG $vgpr1


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59626/new/

https://reviews.llvm.org/D59626