[PATCH] D60459: SILoadStoreOptimizer pass mischedules s_add,s_addc with interfering s_lshl

[Ron Lieberman via Phabricator via llvm-commits]

ronlieb marked an inline comment as done.
ronlieb added a comment.

test will convert to MIR form.
Patch will change to use computeRegisterLiveness. i will have to use a pretty large neighborhood , as the original code this error occurred in (before running bugpoint) , had the s_add_u32 instruction was separated by over 400 instructions from the s_addc_u32 instruction. We will assert fail if we cannot find the s_add_u32 instruction, so that will alert us to increase neighborhood size. This patch will also handle the corresponding sub instructions.



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Comment at: test/CodeGen/AMDGPU/scc-add-lshl-addc.ll:79
+
+!0 = !{!"clang version 8.0.0 "}
+!1 = !{!2, !2, i64 0}
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arsenm wrote:
> I doubt you need any of this metadata
it should vanish once i convert test to MIR form


Repository:
  rL LLVM

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  https://reviews.llvm.org/D60459/new/

https://reviews.llvm.org/D60459