[PATCH] D60462: [TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: arsenm, craig.topper, spatel.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

This patch adds support for BigBitWidth -> SmallBitWidth bitcasts, splitting the DemandedBits/Elts accordingly.

Re: the AMDGPU regression - @arsenm it looks there isn't much that generates BFE U32/S32 nodes in the DAG its mostly done in ISEL - in this case we need to match srl(and(shl(x,c1),c2),c1) - is this something that needs fixing first or are you OK with this change for now?

The X86 changes are all definite wins.


Repository:
  rL LLVM

https://reviews.llvm.org/D60462

Files:
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/AMDGPU/store-weird-sizes.ll
  test/CodeGen/X86/bitcast-setcc-256.ll
  test/CodeGen/X86/dagcombine-cse.ll
  test/CodeGen/X86/masked_store.ll
  test/CodeGen/X86/movmsk-cmp.ll

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