[PATCH] D60426: [InstCombine] prevent possible miscompile with negate+sdiv of vector op

[Sanjay Patel via Phabricator via llvm-commits]

spatel marked an inline comment as done.
spatel added inline comments.


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Comment at: llvm/test/Transforms/InstCombine/div.ll:820
 ;
   %div = sdiv <2 x i8> %x, <i8 -1, i8 1>
   %neg = sub <2 x i8> zeroinitializer, %div
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lebedev.ri wrote:
> spatel wrote:
> > lebedev.ri wrote:
> > > Could also add a test for SINT_MIN (yes, i have seen the next test here)
> > Do you mean a splat of SINT_MIN (that's above here) or something else?
> I actually initially misread `@negate_sdiv_vec_signed_min_elt`, i thought it was:
> ```
> define <2 x i8> @negate_sdiv_vec_signed_min_and_one_elt(<2 x i8> %x) {
>   %div = sdiv <2 x i8> %x, <i8 1, i8 -128>
>   %neg = sub <2 x i8> zeroinitializer, %div
>   ret <2 x i8> %neg
> }
> ```
> and i was going to suggest to add the test that is already in `@negate_sdiv_vec_signed_min_elt`.
> So now i guess i'd suggest maybe adding test from this comment.
Thanks - will do. 

And I'll make a similar code change for the other buggy pattern matcher if that looks like the same problem.


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  https://reviews.llvm.org/D60426/new/

https://reviews.llvm.org/D60426