[PATCH] D60459: SILoadStoreOptimizer pass mischedules s_add,s_addc with interfering s_lshl

[Ron Lieberman via Phabricator via llvm-commits]

ronlieb created this revision.
ronlieb added reviewers: rampitec, arsenm.
Herald added subscribers: llvm-commits, jdoerfert, jfb, nhaehnle, wdng, jvesely.
Herald added a project: LLVM.

  A 64 bit add implimented with two 32 bit add instructions uses the
  $SCC register for carry.  The S_LSHL_B32 instruction write the $SCC reg
  Pass was incorrectly transforming
    S_LSHL_B32
    S_ADD_U32
    S_ADDC_U32
  into
    S_ADD_U32
    S_LSHL_B32
    S_ADDC_U32
  
  SILoadStoreOptimizer constructs a list of instructions to move and did
  not take into account the dependent S_ADD_u32 instruction when it chose
  to move the S_ADDC_U32 instruction.


Repository:
  rL LLVM

https://reviews.llvm.org/D60459

Files:
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/scc-add-lshl-addc.ll

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