[llvm] r357972 - [X86] Have EVEX2VEX tablegenerator use HasVEX_L and HasEVEX_L2 fields instead of the composite EVEX_LL field. Remove the EVEX_LL field. NFCI

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 9 00:40:14 PDT 2019


Author: ctopper
Date: Tue Apr  9 00:40:14 2019
New Revision: 357972

URL: http://llvm.org/viewvc/llvm-project?rev=357972&view=rev
Log:
[X86] Have EVEX2VEX tablegenerator use HasVEX_L and HasEVEX_L2 fields instead of the composite EVEX_LL field. Remove the EVEX_LL field. NFCI

The composite existed to simplify some other tablegen code and not really in an
important way. Remove the combined field and just calculate the vector size
using two ifs.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrFormats.td
    llvm/trunk/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp

Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=357972&r1=357971&r2=357972&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Tue Apr  9 00:40:14 2019
@@ -315,11 +315,8 @@ class X86Inst<bits<8> opcod, Format f, I
   bit hasEVEX_RC = 0;       // Explicitly specified rounding control in FP instruction.
   bit hasNoTrackPrefix = 0; // Does this inst has 0x3E (NoTrack) prefix?
 
-  bits<2> EVEX_LL;
-  let EVEX_LL{0} = hasVEX_L;
-  let EVEX_LL{1} = hasEVEX_L2;
   // Vector size in bytes.
-  bits<7> VectSize = !shl(16, EVEX_LL);
+  bits<7> VectSize = !if(hasEVEX_L2, 64, !if(hasVEX_L, 32, 16));
 
   // The scaling factor for AVX512's compressed displacement is either
   //   - the size of a  power-of-two number of elements or

Modified: llvm/trunk/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp?rev=357972&r1=357971&r2=357972&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp Tue Apr  9 00:40:14 2019
@@ -68,23 +68,6 @@ void X86EVEX2VEXTablesEmitter::printTabl
 }
 
 // Return true if the 2 BitsInits are equal
-static inline bool equalBitsInits(const BitsInit *B1, const BitsInit *B2) {
-  if (B1->getNumBits() != B2->getNumBits())
-    PrintFatalError("Comparing two BitsInits with different sizes!");
-
-  for (unsigned i = 0, e = B1->getNumBits(); i != e; ++i) {
-    if (BitInit *Bit1 = dyn_cast<BitInit>(B1->getBit(i))) {
-      if (BitInit *Bit2 = dyn_cast<BitInit>(B2->getBit(i))) {
-        if (Bit1->getValue() != Bit2->getValue())
-          return false;
-      } else
-        PrintFatalError("Invalid BitsInit bit");
-    } else
-      PrintFatalError("Invalid BitsInit bit");
-  }
-  return true;
-}
-
 // Calculates the integer value residing BitsInit object
 static inline uint64_t getValueFromBitsInit(const BitsInit *B) {
   uint64_t Value = 0;
@@ -119,8 +102,8 @@ public:
         RecV->getValueAsDef("OpPrefix") != RecE->getValueAsDef("OpPrefix") ||
         RecV->getValueAsDef("OpMap") != RecE->getValueAsDef("OpMap") ||
         RecV->getValueAsBit("hasVEX_4V") != RecE->getValueAsBit("hasVEX_4V") ||
-        !equalBitsInits(RecV->getValueAsBitsInit("EVEX_LL"),
-                        RecE->getValueAsBitsInit("EVEX_LL")) ||
+        RecV->getValueAsBit("hasEVEX_L2") != RecE->getValueAsBit("hasEVEX_L2") ||
+        RecV->getValueAsBit("hasVEX_L") != RecE->getValueAsBit("hasVEX_L") ||
         // Match is allowed if either is VEX_WIG, or they match, or EVEX
         // is VEX_W1X and VEX is VEX_W0.
         (!(VEX_WIG || (!EVEX_WIG && EVEX_W == VEX_W) ||
@@ -150,8 +133,9 @@ public:
       } else if (isMemoryOperand(OpRec1) && isMemoryOperand(OpRec2)) {
         return false;
       } else if (isImmediateOperand(OpRec1) && isImmediateOperand(OpRec2)) {
-        if (OpRec1->getValueAsDef("Type") != OpRec2->getValueAsDef("Type"))
+        if (OpRec1->getValueAsDef("Type") != OpRec2->getValueAsDef("Type")) {
           return false;
+        }
       } else
         return false;
     }
@@ -207,8 +191,7 @@ void X86EVEX2VEXTablesEmitter::run(raw_o
     else if (Inst->TheDef->getValueAsDef("OpEnc")->getName() == "EncEVEX" &&
              !Inst->TheDef->getValueAsBit("hasEVEX_K") &&
              !Inst->TheDef->getValueAsBit("hasEVEX_B") &&
-             getValueFromBitsInit(Inst->TheDef->
-                                        getValueAsBitsInit("EVEX_LL")) != 2 &&
+             !Inst->TheDef->getValueAsBit("hasEVEX_L2") &&
              !Inst->TheDef->getValueAsBit("notEVEX2VEXConvertible"))
       EVEXInsts.push_back(Inst);
   }
@@ -236,17 +219,10 @@ void X86EVEX2VEXTablesEmitter::run(raw_o
       continue;
 
     // In case a match is found add new entry to the appropriate table
-    switch (getValueFromBitsInit(
-        EVEXInst->TheDef->getValueAsBitsInit("EVEX_LL"))) {
-    case 0:
-      EVEX2VEX128.push_back(std::make_pair(EVEXInst, VEXInst)); // {0,0}
-      break;
-    case 1:
+    if (EVEXInst->TheDef->getValueAsBit("hasVEX_L"))
       EVEX2VEX256.push_back(std::make_pair(EVEXInst, VEXInst)); // {0,1}
-      break;
-    default:
-      llvm_unreachable("Instruction's size not fit for the mapping!");
-    }
+    else
+      EVEX2VEX128.push_back(std::make_pair(EVEXInst, VEXInst)); // {0,0}
   }
 
   // Print both tables




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