[PATCH] D60436: [AArch64][GlobalISel] Add isel support for vector G_ICMP and G_ASHR & G_LSR

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added a reviewer: paquette.
aemerson added a project: LLVM.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka.
aemerson added a parent revision: D60435: [AArch64][GlobalISel] Legalize vector G_ICMP.

The selection for G_ICMP is unfortunately not currently importable from SDAG due to the use of custom SDNodes. To support this, this selection method has an opcode table which has been generated by a script, indexed by various instruction properties. Ideally in future we will have a GISel native selection patterns that we can write in tablegen to improve on this.

For selection of some types we also need support for G_ASHR and G_LSR which are generated as a result of legalization. This patch also adds support for them, generating the same code as SelectionDAG currently does.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D60436

Files:
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/select-vector-icmp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir

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