[PATCH] D60413: SExt -> Zext when no sign bits is used

[Diogo N. Sampaio via Phabricator via llvm-commits]

dnsampaio created this revision.
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This patch is here for discussion purpose, as I'm not sure where this transformation should fit. Used InstCombine for giving example.


Repository:
  rL LLVM

https://reviews.llvm.org/D60413

Files:
  test/Transforms/InstCombine/cast.ll


Index: test/Transforms/InstCombine/cast.ll
===================================================================
--- test/Transforms/InstCombine/cast.ll
+++ test/Transforms/InstCombine/cast.ll
@@ -1559,3 +1559,24 @@
   %5 = zext i8 %4 to i32
   ret i32 %5
 }
+
+; We should be able to convert the sext to zext here.
+; CHECK-LABEL: define i16 @foo(i16 %a) {
+; CHECK:       %ext = sext i16 %a to i32
+; CHECK-NEXT:  %and = and i32 %ext, 65280
+; CHECK-NEXT:  %lsr = lshr i32 %ext, 8
+; CHECK-NEXT:  %and2 = and i32 %lsr, 255
+; CHECK-NEXT:  %or = or i32 %and, %and2
+; CHECK-NEXT:  %ret = trunc i32 %or to i16
+; CHECK-NEXT:  ret i16 %ret
+
+define i16 @foo(i16 %a) {
+entry:
+  %ext = sext i16 %a to i32
+  %and = and i32 %ext, 65280
+  %lsr = lshr i32 %ext, 8
+  %and2 = and i32 %lsr, 255
+  %or = or i32 %and, %and2
+  %ret = trunc i32 %or to i16
+  ret i16 %ret
+}


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