[llvm] r357910 - [InstCombine] remove overzealous assert for shuffles (PR41419)

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Mon Apr  8 06:28:29 2019
New Revision: 357910

URL: http://llvm.org/viewvc/llvm-project?rev=357910&view=rev
Log:
[InstCombine] remove overzealous assert for shuffles (PR41419)

As the TODO indicates, instsimplify could be improved.

Should fix:
https://bugs.llvm.org/show_bug.cgi?id=41419

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
    llvm/trunk/test/Transforms/InstCombine/shuffle_select.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineVectorOps.cpp?rev=357910&r1=357909&r2=357910&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineVectorOps.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineVectorOps.cpp Mon Apr  8 06:28:29 2019
@@ -1353,8 +1353,8 @@ static Instruction *foldSelectShuffle(Sh
   // Canonicalize to choose from operand 0 first.
   unsigned NumElts = Shuf.getType()->getVectorNumElements();
   if (Shuf.getMaskValue(0) >= (int)NumElts) {
-    assert(!isa<UndefValue>(Shuf.getOperand(1)) &&
-           "Not expecting undef shuffle operand with select mask");
+    // TODO: Can we assert that both operands of a shuffle-select are not undef
+    // (otherwise, it would have been folded by instsimplify?
     Shuf.commute();
     return &Shuf;
   }

Modified: llvm/trunk/test/Transforms/InstCombine/shuffle_select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shuffle_select.ll?rev=357910&r1=357909&r2=357910&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shuffle_select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shuffle_select.ll Mon Apr  8 06:28:29 2019
@@ -1454,3 +1454,13 @@ define <4 x i8> @or_add_2_vars(<4 x i8>
   ret <4 x i8> %t3
 }
 
+; The undef operand is used to simplify the shuffle mask, but don't assert that too soon.
+
+define <4 x i32> @PR41419(<4 x i32> %v) {
+; CHECK-LABEL: @PR41419(
+; CHECK-NEXT:    ret <4 x i32> [[V:%.*]]
+;
+  %s = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 4, i32 5, i32 2, i32 7>
+  ret <4 x i32> %s
+}
+