[llvm] r357904 - [InstCombine] sdiv exact flag fixup.

Chen Zheng via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 8 05:08:03 PDT 2019


Author: shchenz
Date: Mon Apr  8 05:08:03 2019
New Revision: 357904

URL: http://llvm.org/viewvc/llvm-project?rev=357904&view=rev
Log:
[InstCombine] sdiv exact flag fixup.

Differential Revision: https://reviews.llvm.org/D60396

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
    llvm/trunk/test/Transforms/InstCombine/div.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=357904&r1=357903&r2=357904&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Mon Apr  8 05:08:03 2019
@@ -1693,8 +1693,11 @@ Instruction *InstCombiner::visitSub(Bina
 
     // 0 - (X sdiv C)  -> (X sdiv -C)  provided the negation doesn't overflow.
     if (match(Op1, m_SDiv(m_Value(X), m_Constant(C))) && match(Op0, m_Zero()) &&
-        C->isNotMinSignedValue() && !C->isOneValue())
-      return BinaryOperator::CreateSDiv(X, ConstantExpr::getNeg(C));
+        C->isNotMinSignedValue() && !C->isOneValue()) {
+      auto *BO = BinaryOperator::CreateSDiv(X, ConstantExpr::getNeg(C));
+      BO->setIsExact(cast<BinaryOperator>(Op1)->isExact());
+      return BO;
+    }
 
     // 0 - (X << Y)  -> (-X << Y)   when X is freely negatable.
     if (match(Op1, m_Shl(m_Value(X), m_Value(Y))) && match(Op0, m_Zero()))

Modified: llvm/trunk/test/Transforms/InstCombine/div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/div.ll?rev=357904&r1=357903&r2=357904&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/div.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/div.ll Mon Apr  8 05:08:03 2019
@@ -762,7 +762,7 @@ define <2 x i8> @udiv_common_factor_not_
 
 define i32 @test_exact_nsw_exact(i32 %x) {
 ; CHECK-LABEL: @test_exact_nsw_exact(
-; CHECK-NEXT:    [[NEG:%.*]] = sdiv i32 [[X:%.*]], -3
+; CHECK-NEXT:    [[NEG:%.*]] = sdiv exact i32 [[X:%.*]], -3
 ; CHECK-NEXT:    ret i32 [[NEG]]
 ;
   %div = sdiv exact i32 %x, 3
@@ -772,7 +772,7 @@ define i32 @test_exact_nsw_exact(i32 %x)
 
 define <2 x i64> @test_exact_vec(<2 x i64> %x) {
 ; CHECK-LABEL: @test_exact_vec(
-; CHECK-NEXT:    [[NEG:%.*]] = sdiv <2 x i64> [[X:%.*]], <i64 -3, i64 -4>
+; CHECK-NEXT:    [[NEG:%.*]] = sdiv exact <2 x i64> [[X:%.*]], <i64 -3, i64 -4>
 ; CHECK-NEXT:    ret <2 x i64> [[NEG]]
 ;
   %div = sdiv exact <2 x i64> %x, <i64 3, i64 4>
@@ -782,7 +782,7 @@ define <2 x i64> @test_exact_vec(<2 x i6
 
 define i32 @test_exact_nonsw_exact(i32 %x) {
 ; CHECK-LABEL: @test_exact_nonsw_exact(
-; CHECK-NEXT:    [[NEG:%.*]] = sdiv i32 [[X:%.*]], -3
+; CHECK-NEXT:    [[NEG:%.*]] = sdiv exact i32 [[X:%.*]], -3
 ; CHECK-NEXT:    ret i32 [[NEG]]
 ;
   %div = sdiv exact i32 %x, 3
@@ -806,7 +806,7 @@ define i32 @test_exact_nonsw_noexact(i32
 ; CHECK-NEXT:    ret i32 [[NEG]]
 ;
   %div = sdiv i32 %x, 3
-  %neg = sub nsw i32 0, %div
+  %neg = sub i32 0, %div
   ret i32 %neg
 }
 




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