[PATCH] D60397: [Sparc] Fix incorrect MI insertion position for spilling f128.

[Jim Lin via Phabricator via llvm-commits]

Jim created this revision.
Jim added a reviewer: venkatra.
Herald added subscribers: llvm-commits, jrtc27, fedor.sergeev, jyknight.
Herald added a project: LLVM.
Jim edited the summary of this revision.

Obviously, new built MI (sethi+add or sethi+xor+add) for constructing large offset should be inserted before new created MI for storing even register into memory. So the insertion position should be *StMI instead of II.

before fixed:

std %f0, [%g1+80]    
sethi 4, %g1               <<<
add %g1, %sp, %g1   <<< this two instructions should be put before "std %f0, [%g1+80]".
sethi 4, %g1
add %g1, %sp, %g1
std %f2, [%g1+88]

after fixed:

sethi 4, %g1
add %g1, %sp, %g1
std %f0, [%g1+80]    
sethi 4, %g1
add %g1, %sp, %g1
std %f2, [%g1+88]


Repository:
  rL LLVM

https://reviews.llvm.org/D60397

Files:
  lib/Target/Sparc/SparcRegisterInfo.cpp


Index: lib/Target/Sparc/SparcRegisterInfo.cpp
===================================================================
--- lib/Target/Sparc/SparcRegisterInfo.cpp
+++ lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -188,7 +188,7 @@
       MachineInstr *StMI =
         BuildMI(*MI.getParent(), II, dl, TII.get(SP::STDFri))
         .addReg(FrameReg).addImm(0).addReg(SrcEvenReg);
-      replaceFI(MF, II, *StMI, dl, 0, Offset, FrameReg);
+      replaceFI(MF, *StMI, *StMI, dl, 0, Offset, FrameReg);
       MI.setDesc(TII.get(SP::STDFri));
       MI.getOperand(2).setReg(SrcOddReg);
       Offset += 8;
@@ -200,7 +200,7 @@
       MachineInstr *StMI =
         BuildMI(*MI.getParent(), II, dl, TII.get(SP::LDDFri), DestEvenReg)
         .addReg(FrameReg).addImm(0);
-      replaceFI(MF, II, *StMI, dl, 1, Offset, FrameReg);
+      replaceFI(MF, *StMI, *StMI, dl, 1, Offset, FrameReg);
 
       MI.setDesc(TII.get(SP::LDDFri));
       MI.getOperand(0).setReg(DestOddReg);


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