[PATCH] D60394: [X86] Add patterns for using movss/movsd for atomic load/store of f32/64. Remove atomic fadd pseudos use isel patterns instead.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, jfb, reames.
Herald added subscribers: dexonsmith, hiraditya.
Herald added a project: LLVM.

This patch adds patterns for turning bitcasted atomic load/store into movss/sd.

It also removes the pseudo instructions for atomic RMW fadd. Instead just adding isel patterns for folding an atomic load into addss/sd. And relying on the new movss/sd store pattern to handle the write part.

This also makes the fadd patterns use VEX and EVEX instructions when AVX or AVX512F are enabled.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D60394

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86InstrCompiler.td
  llvm/test/CodeGen/X86/atomic-fp.ll
  llvm/test/CodeGen/X86/atomic-non-integer.ll

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