[llvm] r357859 - [X86][SSE] SimplifyDemandedBitsForTargetNode - Add initial PACKSS support
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 7 03:40:01 PDT 2019
Author: rksimon
Date: Sun Apr 7 03:40:01 2019
New Revision: 357859
URL: http://llvm.org/viewvc/llvm-project?rev=357859&view=rev
Log:
[X86][SSE] SimplifyDemandedBitsForTargetNode - Add initial PACKSS support
In the case where we only want the sign bit (e.g. when using PACKSS truncation of comparison results for MOVMSK) then we can just demand the sign bit of the source operands.
This makes use of the fact that PACKSS saturates out of range values to the min/max int values - so the sign bit is always preserved.
Differential Revision: https://reviews.llvm.org/D60333
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll
llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll
llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll
llvm/trunk/test/CodeGen/X86/movmsk-cmp.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=357859&r1=357858&r2=357859&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Apr 7 03:40:01 2019
@@ -33508,6 +33508,25 @@ bool X86TargetLowering::SimplifyDemanded
}
break;
}
+ case X86ISD::PACKSS:
+ // PACKSS saturates to MIN/MAX integer values. So if we just want the
+ // sign bit then we can just ask for the source operands sign bit.
+ // TODO - add known bits handling.
+ if (OriginalDemandedBits.isSignMask()) {
+ APInt DemandedLHS, DemandedRHS;
+ getPackDemandedElts(VT, OriginalDemandedElts, DemandedLHS, DemandedRHS);
+
+ KnownBits KnownLHS, KnownRHS;
+ APInt SignMask = APInt::getSignMask(BitWidth * 2);
+ if (SimplifyDemandedBits(Op.getOperand(0), SignMask, DemandedLHS,
+ KnownLHS, TLO, Depth + 1))
+ return true;
+ if (SimplifyDemandedBits(Op.getOperand(1), SignMask, DemandedRHS,
+ KnownRHS, TLO, Depth + 1))
+ return true;
+ }
+ // TODO - add general PACKSS/PACKUS SimplifyDemandedBits support.
+ break;
case X86ISD::PCMPGT:
// icmp sgt(0, R) == ashr(R, BitWidth-1).
// iff we only need the sign bit then we can use R directly.
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll?rev=357859&r1=357858&r2=357859&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll Sun Apr 7 03:40:01 2019
@@ -74,7 +74,6 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX1-NEXT: vpackssdw %xmm1, %xmm2, %xmm1
; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $15, %xmm0, %xmm0
-; AVX1-NEXT: vpsraw $15, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax
@@ -99,7 +98,6 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX2-NEXT: vpackssdw %xmm1, %xmm2, %xmm1
; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpsllw $15, %xmm0, %xmm0
-; AVX2-NEXT: vpsraw $15, %xmm0, %xmm0
; AVX2-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
@@ -191,7 +189,6 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX12-NEXT: vpackssdw %xmm1, %xmm2, %xmm1
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpsllw $15, %xmm0, %xmm0
-; AVX12-NEXT: vpsraw $15, %xmm0, %xmm0
; AVX12-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: def $al killed $al killed $eax
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll?rev=357859&r1=357858&r2=357859&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll Sun Apr 7 03:40:01 2019
@@ -765,17 +765,13 @@ define void @bitcast_16i8_store(i16* %p,
define void @bitcast_8i16_store(i8* %p, <8 x i16> %a0) {
; SSE2-SSSE3-LABEL: bitcast_8i16_store:
; SSE2-SSSE3: # %bb.0:
-; SSE2-SSSE3-NEXT: pxor %xmm1, %xmm1
-; SSE2-SSSE3-NEXT: pcmpgtw %xmm0, %xmm1
-; SSE2-SSSE3-NEXT: packsswb %xmm0, %xmm1
-; SSE2-SSSE3-NEXT: pmovmskb %xmm1, %eax
+; SSE2-SSSE3-NEXT: packsswb %xmm0, %xmm0
+; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSE2-SSSE3-NEXT: movb %al, (%rdi)
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: bitcast_8i16_store:
; AVX12: # %bb.0:
-; AVX12-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX12-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
; AVX12-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: movb %al, (%rdi)
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll?rev=357859&r1=357858&r2=357859&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll Sun Apr 7 03:40:01 2019
@@ -359,21 +359,14 @@ define void @bitcast_32i8_store(i32* %p,
define void @bitcast_16i16_store(i16* %p, <16 x i16> %a0) {
; SSE2-SSSE3-LABEL: bitcast_16i16_store:
; SSE2-SSSE3: # %bb.0:
-; SSE2-SSSE3-NEXT: pxor %xmm2, %xmm2
-; SSE2-SSSE3-NEXT: pxor %xmm3, %xmm3
-; SSE2-SSSE3-NEXT: pcmpgtw %xmm1, %xmm3
-; SSE2-SSSE3-NEXT: pcmpgtw %xmm0, %xmm2
-; SSE2-SSSE3-NEXT: packsswb %xmm3, %xmm2
-; SSE2-SSSE3-NEXT: pmovmskb %xmm2, %eax
+; SSE2-SSSE3-NEXT: packsswb %xmm1, %xmm0
+; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSE2-SSSE3-NEXT: movw %ax, (%rdi)
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: bitcast_16i16_store:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX1-NEXT: vpcmpgtw %xmm1, %xmm2, %xmm1
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: movw %ax, (%rdi)
@@ -416,13 +409,9 @@ define void @bitcast_16i16_store(i16* %p
define void @bitcast_8i32_store(i8* %p, <8 x i32> %a0) {
; SSE2-SSSE3-LABEL: bitcast_8i32_store:
; SSE2-SSSE3: # %bb.0:
-; SSE2-SSSE3-NEXT: pxor %xmm2, %xmm2
-; SSE2-SSSE3-NEXT: pxor %xmm3, %xmm3
-; SSE2-SSSE3-NEXT: pcmpgtd %xmm1, %xmm3
-; SSE2-SSSE3-NEXT: pcmpgtd %xmm0, %xmm2
-; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
-; SSE2-SSSE3-NEXT: packsswb %xmm0, %xmm2
-; SSE2-SSSE3-NEXT: pmovmskb %xmm2, %eax
+; SSE2-SSSE3-NEXT: packssdw %xmm1, %xmm0
+; SSE2-SSSE3-NEXT: packsswb %xmm0, %xmm0
+; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSE2-SSSE3-NEXT: movb %al, (%rdi)
; SSE2-SSSE3-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll?rev=357859&r1=357858&r2=357859&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll Sun Apr 7 03:40:01 2019
@@ -481,18 +481,10 @@ define void @bitcast_64i8_store(i64* %p,
define void @bitcast_32i16_store(i32* %p, <32 x i16> %a0) {
; SSE-LABEL: bitcast_32i16_store:
; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm4, %xmm4
-; SSE-NEXT: pxor %xmm5, %xmm5
-; SSE-NEXT: pcmpgtw %xmm1, %xmm5
-; SSE-NEXT: pxor %xmm1, %xmm1
-; SSE-NEXT: pcmpgtw %xmm0, %xmm1
-; SSE-NEXT: packsswb %xmm5, %xmm1
-; SSE-NEXT: pmovmskb %xmm1, %eax
-; SSE-NEXT: pxor %xmm0, %xmm0
-; SSE-NEXT: pcmpgtw %xmm3, %xmm0
-; SSE-NEXT: pcmpgtw %xmm2, %xmm4
-; SSE-NEXT: packsswb %xmm0, %xmm4
-; SSE-NEXT: pmovmskb %xmm4, %ecx
+; SSE-NEXT: packsswb %xmm1, %xmm0
+; SSE-NEXT: pmovmskb %xmm0, %eax
+; SSE-NEXT: packsswb %xmm3, %xmm2
+; SSE-NEXT: pmovmskb %xmm2, %ecx
; SSE-NEXT: shll $16, %ecx
; SSE-NEXT: orl %eax, %ecx
; SSE-NEXT: movl %ecx, (%rdi)
@@ -501,14 +493,9 @@ define void @bitcast_32i16_store(i32* %p
; AVX1-LABEL: bitcast_32i16_store:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm3, %xmm0
-; AVX1-NEXT: vpcmpgtw %xmm1, %xmm3, %xmm1
; AVX1-NEXT: vpacksswb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
@@ -519,9 +506,6 @@ define void @bitcast_32i16_store(i32* %p
;
; AVX2-LABEL: bitcast_32i16_store:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX2-NEXT: vpcmpgtw %ymm1, %ymm2, %ymm1
-; AVX2-NEXT: vpcmpgtw %ymm0, %ymm2, %ymm0
; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT: vpmovmskb %ymm0, %eax
@@ -558,31 +542,18 @@ define void @bitcast_32i16_store(i32* %p
define void @bitcast_16i32_store(i16* %p, <16 x i32> %a0) {
; SSE-LABEL: bitcast_16i32_store:
; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm4, %xmm4
-; SSE-NEXT: pxor %xmm5, %xmm5
-; SSE-NEXT: pcmpgtd %xmm3, %xmm5
-; SSE-NEXT: pxor %xmm3, %xmm3
-; SSE-NEXT: pcmpgtd %xmm2, %xmm3
-; SSE-NEXT: packssdw %xmm5, %xmm3
-; SSE-NEXT: pxor %xmm2, %xmm2
-; SSE-NEXT: pcmpgtd %xmm1, %xmm2
-; SSE-NEXT: pcmpgtd %xmm0, %xmm4
-; SSE-NEXT: packssdw %xmm2, %xmm4
-; SSE-NEXT: packsswb %xmm3, %xmm4
-; SSE-NEXT: pmovmskb %xmm4, %eax
+; SSE-NEXT: packssdw %xmm3, %xmm2
+; SSE-NEXT: packssdw %xmm1, %xmm0
+; SSE-NEXT: packsswb %xmm2, %xmm0
+; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: movw %ax, (%rdi)
; SSE-NEXT: retq
;
; AVX1-LABEL: bitcast_16i32_store:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
-; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm1, %xmm3, %xmm1
; AVX1-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
Modified: llvm/trunk/test/CodeGen/X86/movmsk-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movmsk-cmp.ll?rev=357859&r1=357858&r2=357859&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movmsk-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movmsk-cmp.ll Sun Apr 7 03:40:01 2019
@@ -316,18 +316,14 @@ define i1 @allzeros_v64i8_sign(<64 x i8>
define i1 @allones_v8i16_sign(<8 x i16> %arg) {
; SSE2-LABEL: allones_v8i16_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpgtw %xmm0, %xmm1
-; SSE2-NEXT: packsswb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
+; SSE2-NEXT: packsswb %xmm0, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: cmpb $-1, %al
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
; AVX-LABEL: allones_v8i16_sign:
; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
; AVX-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: cmpb $-1, %al
@@ -361,18 +357,14 @@ define i1 @allones_v8i16_sign(<8 x i16>
define i1 @allzeros_v8i16_sign(<8 x i16> %arg) {
; SSE2-LABEL: allzeros_v8i16_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpgtw %xmm0, %xmm1
-; SSE2-NEXT: packsswb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
+; SSE2-NEXT: packsswb %xmm0, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: testb %al, %al
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
; AVX-LABEL: allzeros_v8i16_sign:
; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
; AVX-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: testb %al, %al
@@ -406,12 +398,8 @@ define i1 @allzeros_v8i16_sign(<8 x i16>
define i1 @allones_v16i16_sign(<16 x i16> %arg) {
; SSE2-LABEL: allones_v16i16_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm2, %xmm2
-; SSE2-NEXT: pxor %xmm3, %xmm3
-; SSE2-NEXT: pcmpgtw %xmm1, %xmm3
-; SSE2-NEXT: pcmpgtw %xmm0, %xmm2
-; SSE2-NEXT: packsswb %xmm3, %xmm2
-; SSE2-NEXT: pmovmskb %xmm2, %eax
+; SSE2-NEXT: packsswb %xmm1, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: cmpw $-1, %ax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
@@ -419,9 +407,6 @@ define i1 @allones_v16i16_sign(<16 x i16
; AVX1-LABEL: allones_v16i16_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX1-NEXT: vpcmpgtw %xmm1, %xmm2, %xmm1
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: cmpw $-1, %ax
@@ -468,12 +453,8 @@ define i1 @allones_v16i16_sign(<16 x i16
define i1 @allzeros_v16i16_sign(<16 x i16> %arg) {
; SSE2-LABEL: allzeros_v16i16_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm2, %xmm2
-; SSE2-NEXT: pxor %xmm3, %xmm3
-; SSE2-NEXT: pcmpgtw %xmm1, %xmm3
-; SSE2-NEXT: pcmpgtw %xmm0, %xmm2
-; SSE2-NEXT: packsswb %xmm3, %xmm2
-; SSE2-NEXT: pmovmskb %xmm2, %eax
+; SSE2-NEXT: packsswb %xmm1, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: testw %ax, %ax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
@@ -481,9 +462,6 @@ define i1 @allzeros_v16i16_sign(<16 x i1
; AVX1-LABEL: allzeros_v16i16_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX1-NEXT: vpcmpgtw %xmm1, %xmm2, %xmm1
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
@@ -530,18 +508,10 @@ define i1 @allzeros_v16i16_sign(<16 x i1
define i1 @allones_v32i16_sign(<32 x i16> %arg) {
; SSE2-LABEL: allones_v32i16_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm4, %xmm4
-; SSE2-NEXT: pxor %xmm5, %xmm5
-; SSE2-NEXT: pcmpgtw %xmm1, %xmm5
-; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpgtw %xmm0, %xmm1
-; SSE2-NEXT: packsswb %xmm5, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: pxor %xmm0, %xmm0
-; SSE2-NEXT: pcmpgtw %xmm3, %xmm0
-; SSE2-NEXT: pcmpgtw %xmm2, %xmm4
-; SSE2-NEXT: packsswb %xmm0, %xmm4
-; SSE2-NEXT: pmovmskb %xmm4, %ecx
+; SSE2-NEXT: packsswb %xmm1, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
+; SSE2-NEXT: packsswb %xmm3, %xmm2
+; SSE2-NEXT: pmovmskb %xmm2, %ecx
; SSE2-NEXT: shll $16, %ecx
; SSE2-NEXT: orl %eax, %ecx
; SSE2-NEXT: cmpl $-1, %ecx
@@ -551,14 +521,9 @@ define i1 @allones_v32i16_sign(<32 x i16
; AVX1-LABEL: allones_v32i16_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm3, %xmm0
-; AVX1-NEXT: vpcmpgtw %xmm1, %xmm3, %xmm1
; AVX1-NEXT: vpacksswb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
@@ -570,9 +535,6 @@ define i1 @allones_v32i16_sign(<32 x i16
;
; AVX2-LABEL: allones_v32i16_sign:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX2-NEXT: vpcmpgtw %ymm1, %ymm2, %ymm1
-; AVX2-NEXT: vpcmpgtw %ymm0, %ymm2, %ymm0
; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT: vpmovmskb %ymm0, %eax
@@ -615,18 +577,10 @@ define i1 @allones_v32i16_sign(<32 x i16
define i1 @allzeros_v32i16_sign(<32 x i16> %arg) {
; SSE2-LABEL: allzeros_v32i16_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm4, %xmm4
-; SSE2-NEXT: pxor %xmm5, %xmm5
-; SSE2-NEXT: pcmpgtw %xmm1, %xmm5
-; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpgtw %xmm0, %xmm1
-; SSE2-NEXT: packsswb %xmm5, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: pxor %xmm0, %xmm0
-; SSE2-NEXT: pcmpgtw %xmm3, %xmm0
-; SSE2-NEXT: pcmpgtw %xmm2, %xmm4
-; SSE2-NEXT: packsswb %xmm0, %xmm4
-; SSE2-NEXT: pmovmskb %xmm4, %ecx
+; SSE2-NEXT: packsswb %xmm1, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
+; SSE2-NEXT: packsswb %xmm3, %xmm2
+; SSE2-NEXT: pmovmskb %xmm2, %ecx
; SSE2-NEXT: shll $16, %ecx
; SSE2-NEXT: orl %eax, %ecx
; SSE2-NEXT: sete %al
@@ -635,14 +589,9 @@ define i1 @allzeros_v32i16_sign(<32 x i1
; AVX1-LABEL: allzeros_v32i16_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
-; AVX1-NEXT: vpcmpgtw %xmm0, %xmm3, %xmm0
-; AVX1-NEXT: vpcmpgtw %xmm1, %xmm3, %xmm1
; AVX1-NEXT: vpacksswb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
@@ -653,9 +602,6 @@ define i1 @allzeros_v32i16_sign(<32 x i1
;
; AVX2-LABEL: allzeros_v32i16_sign:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX2-NEXT: vpcmpgtw %ymm1, %ymm2, %ymm1
-; AVX2-NEXT: vpcmpgtw %ymm0, %ymm2, %ymm0
; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT: vpmovmskb %ymm0, %eax
@@ -777,13 +723,9 @@ define i1 @allzeros_v4i32_sign(<4 x i32>
define i1 @allones_v8i32_sign(<8 x i32> %arg) {
; SSE2-LABEL: allones_v8i32_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm2, %xmm2
-; SSE2-NEXT: pxor %xmm3, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
-; SSE2-NEXT: packssdw %xmm3, %xmm2
-; SSE2-NEXT: packsswb %xmm0, %xmm2
-; SSE2-NEXT: pmovmskb %xmm2, %eax
+; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: packsswb %xmm0, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: cmpb $-1, %al
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
@@ -823,13 +765,9 @@ define i1 @allones_v8i32_sign(<8 x i32>
define i1 @allzeros_v8i32_sign(<8 x i32> %arg) {
; SSE2-LABEL: allzeros_v8i32_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm2, %xmm2
-; SSE2-NEXT: pxor %xmm3, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
-; SSE2-NEXT: packssdw %xmm3, %xmm2
-; SSE2-NEXT: packsswb %xmm0, %xmm2
-; SSE2-NEXT: pmovmskb %xmm2, %eax
+; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: packsswb %xmm0, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: testb %al, %al
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
@@ -869,18 +807,10 @@ define i1 @allzeros_v8i32_sign(<8 x i32>
define i1 @allones_v16i32_sign(<16 x i32> %arg) {
; SSE2-LABEL: allones_v16i32_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm4, %xmm4
-; SSE2-NEXT: pxor %xmm5, %xmm5
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
-; SSE2-NEXT: pxor %xmm3, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT: packssdw %xmm5, %xmm3
-; SSE2-NEXT: pxor %xmm2, %xmm2
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm2
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm4
-; SSE2-NEXT: packssdw %xmm2, %xmm4
-; SSE2-NEXT: packsswb %xmm3, %xmm4
-; SSE2-NEXT: pmovmskb %xmm4, %eax
+; SSE2-NEXT: packssdw %xmm3, %xmm2
+; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: packsswb %xmm2, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: cmpw $-1, %ax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
@@ -888,13 +818,8 @@ define i1 @allones_v16i32_sign(<16 x i32
; AVX1-LABEL: allones_v16i32_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
-; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm1, %xmm3, %xmm1
; AVX1-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
@@ -943,18 +868,10 @@ define i1 @allones_v16i32_sign(<16 x i32
define i1 @allzeros_v16i32_sign(<16 x i32> %arg) {
; SSE2-LABEL: allzeros_v16i32_sign:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm4, %xmm4
-; SSE2-NEXT: pxor %xmm5, %xmm5
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
-; SSE2-NEXT: pxor %xmm3, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT: packssdw %xmm5, %xmm3
-; SSE2-NEXT: pxor %xmm2, %xmm2
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm2
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm4
-; SSE2-NEXT: packssdw %xmm2, %xmm4
-; SSE2-NEXT: packsswb %xmm3, %xmm4
-; SSE2-NEXT: pmovmskb %xmm4, %eax
+; SSE2-NEXT: packssdw %xmm3, %xmm2
+; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: packsswb %xmm2, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: testw %ax, %ax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
@@ -962,13 +879,8 @@ define i1 @allzeros_v16i32_sign(<16 x i3
; AVX1-LABEL: allzeros_v16i32_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
-; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm1, %xmm3, %xmm1
; AVX1-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vpcmpgtd %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
@@ -4663,13 +4575,9 @@ define i32 @movmskpd256(<4 x double> %x)
define i32 @movmskps256(<8 x float> %x) {
; SSE2-LABEL: movmskps256:
; SSE2: # %bb.0:
-; SSE2-NEXT: pxor %xmm2, %xmm2
-; SSE2-NEXT: pxor %xmm3, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
-; SSE2-NEXT: packssdw %xmm3, %xmm2
-; SSE2-NEXT: packsswb %xmm0, %xmm2
-; SSE2-NEXT: pmovmskb %xmm2, %eax
+; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: packsswb %xmm0, %xmm0
+; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: movzbl %al, %eax
; SSE2-NEXT: retq
;
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