[PATCH] D60367: [TableGen] Introduce !listsplat 'binary' operator

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri marked an inline comment as done.
lebedev.ri added inline comments.


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Comment at: lib/Target/X86/X86ScheduleBdVer2.td:214
+                          !listsplat(1, !size(ExePorts)),
+                          Res))),
                     !add(UOps, LoadUOps)>;
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lebedev.ri wrote:
> craig.topper wrote:
> > Doesn’t WriteRes already treat an empty list as 1 cycle per port?
> The problem is that you can't concatenate an empty list (implied all-ones) with non-empty list here.
> The result will be the non-empty list, and it won't match the length of the `ExePorts` list.
> 
Or, to actually answer your question, the problems begin when `LoadRes` != `1` here,
which is the case in `PdWriteResYMMPair`, and more importantly i think it will be the case for `PdWriteResExPair`


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  https://reviews.llvm.org/D60367/new/

https://reviews.llvm.org/D60367