[PATCH] D59626: [AMDGPU] Add MachineDCE pass after RenameIndependentSubregs
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 5 11:13:48 PDT 2019
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:168-170
+DisableDCEInRA("amdgpu-disable-dce-in-ra",
+ cl::init(false), cl::Hidden,
+ cl::desc("Disable machine DCE inside regalloc"));
----------------
I prefer avoiding double negative flags, so -amdgpu-dce-in-ra and default to true
================
Comment at: test/CodeGen/AMDGPU/dead-lane.mir:10-15
+registers:
+ - { id: 0, class: vgpr_32}
+ - { id: 1, class: vgpr_32}
+ - { id: 2, class: vgpr_32}
+ - { id: 3, class: vreg_64}
+ - { id: 4, class: vreg_64}
----------------
You can drop the registers section (although %0 will need a class marker)
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D59626/new/
https://reviews.llvm.org/D59626
More information about the llvm-commits
mailing list