[PATCH] D60295: [SelectionDAG] Change the jump table size unit from entry to target

[Evandro Menezes via Phabricator via llvm-commits]

evandro created this revision.
evandro added reviewers: hans, ayonam, junbuml.
Herald added subscribers: llvm-commits, jsji, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar, asb, kbarton, aheejin, hiraditya, jgravelle-google, sbc100, javed.absar, nemanjai, dylanmckay, dschuff.
Herald added a project: LLVM.

Modern processors predict the target(s) of an indirect branche regardless of the size of any jump table used to glean its target address. Rather, branch predictors typically use resources limited by the number of actual targets that occur at run time.

This patch changes the semantics of the options `min-jump-table-entries` and `max-jump-table-size` to use the number of different targets instead of the number of entries in a jump table. Thus, the are now renamed to `min-jump-table-cases` and `max-jump-table-cases`, respectively.

Before, when `max-jump-table-cases` was specified, it could happen that cluster jump tables could have targets used repeatedly, but typically the same length. With this patch, tables may have different lengths, but typically the same number of unique targets.


Repository:
  rL LLVM

https://reviews.llvm.org/D60295

Files:
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/AVR/AVRISelLowering.cpp
  llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
  llvm/lib/Target/Lanai/LanaiISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/AArch64/max-jump-table.ll
  llvm/test/CodeGen/AArch64/min-jump-table.ll
  llvm/test/CodeGen/Generic/MachineBranchProb.ll
  llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
  llvm/test/CodeGen/X86/switch-order-weight.ll
  llvm/test/CodeGen/X86/switch.ll

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