[llvm] r357762 - AMDGPU/GlobalISel: Fix non-power-of-2 select
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 5 07:03:05 PDT 2019
Author: arsenm
Date: Fri Apr 5 07:03:04 2019
New Revision: 357762
URL: http://llvm.org/viewvc/llvm-project?rev=357762&view=rev
Log:
AMDGPU/GlobalISel: Fix non-power-of-2 select
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=357762&r1=357761&r2=357762&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Fri Apr 5 07:03:04 2019
@@ -486,6 +486,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
.clampMaxNumElements(0, LocalPtr, 2)
.clampMaxNumElements(0, PrivatePtr, 2)
.scalarize(0)
+ .widenScalarToNextPow2(0)
.legalIf(all(isPointer(0), typeIs(1, S1)));
// TODO: Only the low 4/5/6 bits of the shift amount are observed, so we can
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir?rev=357762&r1=357761&r2=357762&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir Fri Apr 5 07:03:04 2019
@@ -50,6 +50,34 @@ body: |
...
---
+name: test_select_s48
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: test_select_s48
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[C1]](s64)
+ ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[C2]](s64)
+ ; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[COPY1]], [[COPY2]]
+ ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64)
+ ; CHECK: $vgpr0_vgpr1 = COPY [[COPY3]](s64)
+ %0:_(s32) = G_CONSTANT i32 0
+ %1:_(s32) = COPY $vgpr0
+
+ %2:_(s1) = G_ICMP intpred(ne), %0, %1
+ %3:_(s48) = G_CONSTANT i48 1
+ %4:_(s48) = G_CONSTANT i48 2
+ %5:_(s48) = G_SELECT %2, %3, %4
+ %6:_(s64) = G_ANYEXT %5
+ $vgpr0_vgpr1 = COPY %6
+
+...
+
+---
name: test_select_s16
body: |
bb.0:
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