[PATCH] D60278: [X86] Promote i16 SRA instructions to i32

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon, andreadb.
Herald added subscribers: jfb, hiraditya.
Herald added a project: LLVM.

We already promote SRL and SHL to i32.

This will introduce sign extends sometimes which might be harder to deal with than the zero we use for promoting SRL. I ran this through some of our internal benchmark lists and didn't see any major regressions.

I think there might be some DAG combine improvement opportunities in the test changes here.


https://reviews.llvm.org/D60278

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/dagcombine-shifts.ll
  llvm/test/CodeGen/X86/iabs.ll
  llvm/test/CodeGen/X86/load-scalar-as-vector.ll
  llvm/test/CodeGen/X86/pr32420.ll
  llvm/test/CodeGen/X86/speculative-load-hardening.ll

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