[llvm] r357681 - [ARM GlobalISel] Support DBG_VALUE
Diana Picus via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 4 03:24:51 PDT 2019
Author: rovka
Date: Thu Apr 4 03:24:51 2019
New Revision: 357681
URL: http://llvm.org/viewvc/llvm-project?rev=357681&view=rev
Log:
[ARM GlobalISel] Support DBG_VALUE
Make sure we can map and select DBG_VALUE.
Added:
llvm/trunk/test/CodeGen/ARM/GlobalISel/select-dbg.mir
Modified:
llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
Modified: llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp?rev=357681&r1=357680&r2=357681&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp Thu Apr 4 03:24:51 2019
@@ -423,6 +423,13 @@ ARMRegisterBankInfo::getInstrMapping(con
OperandsMapping =
getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr});
break;
+ case DBG_VALUE: {
+ SmallVector<const ValueMapping *, 4> OperandBanks(NumOperands);
+ if (MI.getOperand(0).isReg() && MI.getOperand(0).getReg())
+ OperandBanks[0] = &ARM::ValueMappings[ARM::GPR3OpsIdx];
+ OperandsMapping = getOperandsMapping(OperandBanks);
+ break;
+ }
default:
return getInvalidInstructionMapping();
}
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir?rev=357681&r1=357680&r2=357681&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir Thu Apr 4 03:24:51 2019
@@ -83,10 +83,21 @@
define void @test_soft_fp_s64() #0 { ret void }
+ define void @test_dbg_value() #0 { ret void }
+
attributes #0 = { "target-features"="+vfp2"}
attributes #1 = { "target-features"="+hwdiv-arm,+hwdiv" }
attributes #2 = { "target-features"="+vfp4"}
attributes #3 = { "target-features"="+v5t"}
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llvm", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+ !1 = !DIFile(filename: "dbg.ll", directory: "/tmp")
+ !2 = !{}
+ !5 = distinct !DISubprogram(name: "test_dbg_value", scope: !1, file: !1, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
+ !6 = !DISubroutineType(types: !2)
+ !7 = !DILocalVariable(name: "x", arg: 1, scope: !5, file: !1, line: 1, type: !8)
+ !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+ !9 = !DILocation(line: 1, column: 1, scope: !5)
...
---
name: test_add_s32
@@ -1479,3 +1490,48 @@ body: |
BX_RET 14, $noreg, implicit $r0, implicit $r1
...
+---
+name: test_dbg_value
+# CHECK-LABEL: name: test_dbg_value
+legalized: true
+regBankSelected: false
+selected: false
+
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+body: |
+ bb.0:
+ liveins: $r0, $s1
+
+ %0(s32) = COPY $r0
+ %1(s32) = COPY $s1
+
+ ; {{%[0-9]+}}:gpr = G_ADD
+ %2(s32) = G_ADD %0, %0
+
+ ; DBG_VALUE {{%[0-9]+}}:gpr, $noreg, !7, !DIExpression(), debug-location !9
+ DBG_VALUE %2(s32), $noreg, !7, !DIExpression(), debug-location !9
+
+ ; {{%[0-9]+}}:fpr = G_FADD
+ %3(s32) = G_FADD %1, %1
+
+ ; DBG_VALUE {{%[0-9]+}}:fpr, $noreg, !7, !DIExpression(), debug-location !9
+ DBG_VALUE %3(s32), $noreg, !7, !DIExpression(), debug-location !9
+
+ ; DBG_VALUE i32 42, 0, !7, !DIExpression(), debug-location !9
+ DBG_VALUE i32 42, 0, !7, !DIExpression(), debug-location !9
+
+ ; DBG_VALUE float 1.000000e+00, 0, !7, !DIExpression(), debug-location !9
+ DBG_VALUE float 1.000000e+00, 0, !7, !DIExpression(), debug-location !9
+
+ ; DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9
+ DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9
+
+ $r0 = COPY %2(s32)
+ $s1 = COPY %3(s32)
+ BX_RET 14, $noreg, implicit $r0, implicit $s1
+
+...
Added: llvm/trunk/test/CodeGen/ARM/GlobalISel/select-dbg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/select-dbg.mir?rev=357681&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/select-dbg.mir (added)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/select-dbg.mir Thu Apr 4 03:24:51 2019
@@ -0,0 +1,57 @@
+# RUN: llc -O0 -mtriple arm-- -mattr=+vfp2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,ARM
+# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2,+vfp2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,THUMB
+--- |
+ define void @test_dbg_value() #0 { ret void }
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llvm", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+ !1 = !DIFile(filename: "dbg.ll", directory: "/tmp")
+ !2 = !{}
+ !5 = distinct !DISubprogram(name: "test_dbg_value", scope: !1, file: !1, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
+ !6 = !DISubroutineType(types: !2)
+ !7 = !DILocalVariable(name: "x", arg: 1, scope: !5, file: !1, line: 1, type: !8)
+ !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+ !9 = !DILocation(line: 1, column: 1, scope: !5)
+...
+---
+name: test_dbg_value
+# CHECK-LABEL: name: test_dbg_value
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK: selected: true
+registers:
+ - { id: 0, class: gprb }
+ - { id: 1, class: fprb }
+ - { id: 2, class: gprb }
+ - { id: 3, class: fprb }
+body: |
+ bb.0:
+ liveins: $r0, $s1
+
+ %0(s32) = COPY $r0
+ %1(s32) = COPY $s1
+
+ %2(s32) = G_ADD %0, %0
+
+ ; DBG_VALUE {{%[0-9]+}}:gpr, $noreg, !7, !DIExpression(), debug-location !9
+ DBG_VALUE %2(s32), $noreg, !7, !DIExpression(), debug-location !9
+
+ %3(s32) = G_FADD %1, %1
+
+ ; DBG_VALUE {{%[0-9]+}}:spr, $noreg, !7, !DIExpression(), debug-location !9
+ DBG_VALUE %3(s32), $noreg, !7, !DIExpression(), debug-location !9
+
+ ; DBG_VALUE i32 42, 0, !7, !DIExpression(), debug-location !9
+ DBG_VALUE i32 42, 0, !7, !DIExpression(), debug-location !9
+
+ ; DBG_VALUE float 1.000000e+00, 0, !7, !DIExpression(), debug-location !9
+ DBG_VALUE float 1.000000e+00, 0, !7, !DIExpression(), debug-location !9
+
+ ; DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9
+ DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9
+
+ $r0 = COPY %2(s32)
+ $s1 = COPY %3(s32)
+ BX_RET 14, $noreg, implicit $r0, implicit $s1
+
+...
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