[PATCH] D59626: Add MachineDCE pass after RenameIndependentSubregs

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec updated this revision to Diff 193617.
rampitec added a comment.

Skip this invocation for targets which do not have subregister liveness.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59626/new/

https://reviews.llvm.org/D59626

Files:
  lib/CodeGen/DeadMachineInstructionElim.cpp
  lib/CodeGen/TargetPassConfig.cpp
  test/CodeGen/AArch64/O3-pipeline.ll
  test/CodeGen/AMDGPU/dead-lane.mir
  test/CodeGen/AMDGPU/salu-to-valu.ll
  test/CodeGen/AMDGPU/sdwa-peephole.ll
  test/CodeGen/AMDGPU/shrink-carry.mir
  test/CodeGen/AMDGPU/spill-empty-live-interval.mir
  test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
  test/CodeGen/Hexagon/v6-unaligned-spill.ll
  test/CodeGen/X86/O3-pipeline.ll
  test/CodeGen/X86/llc-start-stop-instance.ll

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