[llvm] r357571 - [DAGCombine] Don't use getZExtValue() until we know the constant is in range.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 3 04:00:56 PDT 2019


Author: rksimon
Date: Wed Apr  3 04:00:55 2019
New Revision: 357571

URL: http://llvm.org/viewvc/llvm-project?rev=357571&view=rev
Log:
[DAGCombine] Don't use getZExtValue() until we know the constant is in range.

Noticed during prep for a patch for PR40758.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=357571&r1=357570&r2=357571&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Apr  3 04:00:55 2019
@@ -6843,8 +6843,8 @@ SDValue DAGCombiner::visitSHL(SDNode *N)
   if (N1C && N0.getOpcode() == ISD::SRL && N0.hasOneUse() &&
       TLI.shouldFoldShiftPairToMask(N, Level)) {
     if (ConstantSDNode *N0C1 = isConstOrConstSplat(N0.getOperand(1))) {
-      uint64_t c1 = N0C1->getZExtValue();
-      if (c1 < OpSizeInBits) {
+      if (N0C1->getAPIntValue().ult(OpSizeInBits)) {
+        uint64_t c1 = N0C1->getZExtValue();
         uint64_t c2 = N1C->getZExtValue();
         APInt Mask = APInt::getHighBitsSet(OpSizeInBits, OpSizeInBits - c1);
         SDValue Shift;




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