[PATCH] D60185: [X86] Make the post machine scheduler macrofusion-aware.
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 3 03:09:27 PDT 2019
lebedev.ri added a comment.
> Given that X86 does not use this currently, this is an NFC.
Are you sure?
In D59688#1446261 <https://reviews.llvm.org/D59688#1446261>, @courbet wrote:
> In D59688#1446250 <https://reviews.llvm.org/D59688#1446250>, @lebedev.ri wrote:
>
> > In D59688#1446142 <https://reviews.llvm.org/D59688#1446142>, @courbet wrote:
> >
> > > > This could use test coverage i guess?
> > >
> > > This is actually an NFC as the post-ra scheduler is not on by default. The next patch that enables scheduling will show the actual changes.
> >
> >
> > What about CPU's that specify `let PostRAScheduler = 1;` ?
>
>
> Ah yes, sorry I lost track of this. Interestingly there are no tests that fail currently. I'll try to come up with some that do.
>
> For now I'll submit the refactoring part of this change (D59689 <https://reviews.llvm.org/D59689>).
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rL LLVM
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https://reviews.llvm.org/D60185/new/
https://reviews.llvm.org/D60185
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