[PATCH] D60150: [DAGCombiner][x86] scalarize splatted vector FP ops
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 3 02:41:27 PDT 2019
RKSimon added inline comments.
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Comment at: llvm/include/llvm/CodeGen/TargetLowering.h:2447
+ virtual bool shouldScalarizeBinopSplat(SDValue VecOp,
+ unsigned SplatIdx) const {
+ return false;
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Would we gain anything from supporting separate LHS/RHS splat indices? x86 probably not but other targets where larger vector register types often alias smaller/scalar (ARM NEON?)
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.h:1075
+ EVT EltVT = VecOp.getValueType().getScalarType();
+ return (EltVT == MVT::f32 || EltVT == MVT::f64) && !SplatIndex;
+ }
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I'm still amazed we haven't ended up with a isExtractElementCheap helper yet.
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Comment at: llvm/test/CodeGen/X86/scalarize-fp.ll:481
+ ret <2 x i64> %r
+}
+
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Add these to trunk?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D60150/new/
https://reviews.llvm.org/D60150
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