[PATCH] D60181: [PowerPC] More precise exploitation of P9 maddld instruction when operands are constant

[Zixuan Wu via Phabricator via llvm-commits]

wuzish created this revision.
wuzish added reviewers: hfinkel, nemanjai, jsji.
Herald added subscribers: llvm-commits, hiraditya.
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There are 3 operands of maddld, (add (mul %1, %2), %3) and sometimes they are constant. 
If there is constant operand, it takes extra li to materialize the operand, and one more extra register too.
So it's not profitable to use maddld to optimize mul-add pattern.


Repository:
  rL LLVM

https://reviews.llvm.org/D60181

Files:
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/test/CodeGen/PowerPC/maddld.ll

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