[PATCH] D60156: [X86] Use FILD/FIST to implement i64 atomic load on 32-bit targets with X87, but no SSE2
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 2 15:05:50 PDT 2019
craig.topper created this revision.
craig.topper added reviewers: efriedma, RKSimon, spatel, reames, jfb.
Herald added subscribers: dexonsmith, hiraditya.
Herald added a project: LLVM.
If we have X87, but not SSE2 we can atomicaly load an i64 value into the significand of an 80-bit extended precision x87 register using fild. We can then use a fist instruction to convert it back to an i64 integer and store it to a stack temporary. From there we can do two 32-bit loads to get the value into integer registers without worrying about atomicness.
This matches what gcc and icc do for this case and removes an existing FIXME.
https://reviews.llvm.org/D60156
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86InstrFPStack.td
llvm/test/CodeGen/X86/atomic-load-store-wide.ll
llvm/test/CodeGen/X86/atomic-mi.ll
llvm/test/CodeGen/X86/atomic-non-integer.ll
llvm/test/CodeGen/X86/misched_phys_reg_assign_order.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D60156.193370.patch
Type: text/x-patch
Size: 39718 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190402/afc1bb7a/attachment.bin>
More information about the llvm-commits
mailing list