[llvm] r357494 - [PowerPC] Fix reversed bit issue in DCMX mask for "xvtstdcdp" and "xvtstdcsp" P9 implementation

[Stefan Pintilie via llvm-commits]

Author: stefanp
Date: Tue Apr  2 09:56:01 2019
New Revision: 357494

URL: http://llvm.org/viewvc/llvm-project?rev=357494&view=rev
Log:
[PowerPC] Fix reversed bit issue in DCMX mask for "xvtstdcdp" and "xvtstdcsp" P9 implementation

Did experiments on power 9 machine, checked the outputs for NaN & Infinity+
cases with corresponding DCMX bit set. Confirmed the DCMX mask bit for NaN and
infinity+ are reversed.

This patch fixes the issue.

Patch by Victor Huang.

Differential Revision: https://reviews.llvm.org/D59384

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td
    llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt
    llvm/trunk/test/MC/PowerPC/vsx.s

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td?rev=357494&r1=357493&r2=357494&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td Tue Apr  2 09:56:01 2019
@@ -1183,9 +1183,9 @@ class XX2_RD6_DCMX7_RS6<bits<6> opcode,
   let Inst{11-15} = DCMX{4-0};
   let Inst{16-20} = XB{4-0};
   let Inst{21-24} = xo1;
-  let Inst{25}    = DCMX{5};
+  let Inst{25}    = DCMX{6};
   let Inst{26-28} = xo2;
-  let Inst{29}    = DCMX{6};
+  let Inst{29}    = DCMX{5};
   let Inst{30}    = XB{5};
   let Inst{31}    = XT{5};
 }

Modified: llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt?rev=357494&r1=357493&r2=357494&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt Tue Apr  2 09:56:01 2019
@@ -853,3 +853,9 @@
 
 # CHECK: mfvsrld 3, 34
 0x7c 0x43 0x02 0x67
+
+# CHECK: xvtstdcdp 63, 63, 65
+0xf3 0xe1 0xff 0xeb
+
+# CHECK: xvtstdcsp 63, 63, 34
+0xf3 0xe2 0xfe 0xaf

Modified: llvm/trunk/test/MC/PowerPC/vsx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/vsx.s?rev=357494&r1=357493&r2=357494&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/vsx.s (original)
+++ llvm/trunk/test/MC/PowerPC/vsx.s Tue Apr  2 09:56:01 2019
@@ -948,3 +948,10 @@
 # CHECK-BE: mfvsrld 3, 34                      # encoding: [0x7c,0x43,0x02,0x67]
 # CHECK-LE: mfvsrld 3, 34                      # encoding: [0x67,0x02,0x43,0x7c]
             mfvsrld 3, 34
+
+# CHECK-BE: xvtstdcdp 63, 63, 65               # encoding: [0xf3,0xe1,0xff,0xeb]
+# CHECK-LE: xvtstdcdp 63, 63, 65               # encoding: [0xeb,0xff,0xe1,0xf3]
+            xvtstdcdp 63, 63, 65
+# CHECK-BE: xvtstdcsp 63, 63, 34               # encoding: [0xf3,0xe2,0xfe,0xaf]
+# CHECK-LE: xvtstdcsp 63, 63, 34               # encoding: [0xaf,0xfe,0xe2,0xf3]
+            xvtstdcsp 63, 63, 34