[llvm] r357300 - [X86] Add test cases showing failure to use RMW form of negate when only flags are used. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 29 12:09:37 PDT 2019
Author: ctopper
Date: Fri Mar 29 12:09:37 2019
New Revision: 357300
URL: http://llvm.org/viewvc/llvm-project?rev=357300&view=rev
Log:
[X86] Add test cases showing failure to use RMW form of negate when only flags are used. NFC
Modified:
llvm/trunk/test/CodeGen/X86/fold-rmw-ops.ll
Modified: llvm/trunk/test/CodeGen/X86/fold-rmw-ops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-rmw-ops.ll?rev=357300&r1=357299&r2=357300&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-rmw-ops.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-rmw-ops.ll Fri Mar 29 12:09:37 2019
@@ -2430,3 +2430,139 @@ b:
tail call void @b()
ret void
}
+
+define void @neg64_br() nounwind {
+; CHECK-LABEL: neg64_br:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: subq {{.*}}(%rip), %rax # encoding: [0x48,0x2b,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 3, value: g64-4, kind: reloc_riprel_4byte_relax_rex
+; CHECK-NEXT: movq %rax, {{.*}}(%rip) # encoding: [0x48,0x89,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 3, value: g64-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: js .LBB76_1 # encoding: [0x78,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: .LBB76_1-1, kind: FK_PCRel_1
+; CHECK-NEXT: # %bb.2: # %b
+; CHECK-NEXT: jmp b # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: b-1, kind: FK_PCRel_1
+; CHECK-NEXT: .LBB76_1: # %a
+; CHECK-NEXT: jmp a # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: a-1, kind: FK_PCRel_1
+entry:
+ %load1 = load i64, i64* @g64
+ %sub = sub i64 0, %load1
+ store i64 %sub, i64* @g64
+ %cond = icmp slt i64 %sub, 0
+ br i1 %cond, label %a, label %b
+
+a:
+ tail call void @a()
+ ret void
+
+b:
+ tail call void @b()
+ ret void
+}
+
+define void @neg32_br() nounwind {
+; CHECK-LABEL: neg32_br:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: subl {{.*}}(%rip), %eax # encoding: [0x2b,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 2, value: g32-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: movl %eax, {{.*}}(%rip) # encoding: [0x89,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 2, value: g32-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: js .LBB77_1 # encoding: [0x78,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: .LBB77_1-1, kind: FK_PCRel_1
+; CHECK-NEXT: # %bb.2: # %b
+; CHECK-NEXT: jmp b # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: b-1, kind: FK_PCRel_1
+; CHECK-NEXT: .LBB77_1: # %a
+; CHECK-NEXT: jmp a # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: a-1, kind: FK_PCRel_1
+entry:
+ %load1 = load i32, i32* @g32
+ %sub = sub i32 0, %load1
+ store i32 %sub, i32* @g32
+ %cond = icmp slt i32 %sub, 0
+ br i1 %cond, label %a, label %b
+
+a:
+ tail call void @a()
+ ret void
+
+b:
+ tail call void @b()
+ ret void
+}
+
+define void @neg16_br() nounwind {
+; CHECK-LABEL: neg16_br:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: subw {{.*}}(%rip), %ax # encoding: [0x66,0x2b,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 3, value: g16-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: movw %ax, {{.*}}(%rip) # encoding: [0x66,0x89,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 3, value: g16-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: js .LBB78_1 # encoding: [0x78,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: .LBB78_1-1, kind: FK_PCRel_1
+; CHECK-NEXT: # %bb.2: # %b
+; CHECK-NEXT: jmp b # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: b-1, kind: FK_PCRel_1
+; CHECK-NEXT: .LBB78_1: # %a
+; CHECK-NEXT: jmp a # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: a-1, kind: FK_PCRel_1
+entry:
+ %load1 = load i16, i16* @g16
+ %sub = sub i16 0, %load1
+ store i16 %sub, i16* @g16
+ %cond = icmp slt i16 %sub, 0
+ br i1 %cond, label %a, label %b
+
+a:
+ tail call void @a()
+ ret void
+
+b:
+ tail call void @b()
+ ret void
+}
+
+define void @neg8_br() nounwind {
+; CHECK-LABEL: neg8_br:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: subb {{.*}}(%rip), %al # encoding: [0x2a,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 2, value: g8-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: movb %al, {{.*}}(%rip) # encoding: [0x88,0x05,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 2, value: g8-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: js .LBB79_1 # encoding: [0x78,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: .LBB79_1-1, kind: FK_PCRel_1
+; CHECK-NEXT: # %bb.2: # %b
+; CHECK-NEXT: jmp b # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: b-1, kind: FK_PCRel_1
+; CHECK-NEXT: .LBB79_1: # %a
+; CHECK-NEXT: jmp a # TAILCALL
+; CHECK-NEXT: # encoding: [0xeb,A]
+; CHECK-NEXT: # fixup A - offset: 1, value: a-1, kind: FK_PCRel_1
+entry:
+ %load1 = load i8, i8* @g8
+ %sub = sub i8 0, %load1
+ store i8 %sub, i8* @g8
+ %cond = icmp slt i8 %sub, 0
+ br i1 %cond, label %a, label %b
+
+a:
+ tail call void @a()
+ ret void
+
+b:
+ tail call void @b()
+ ret void
+}
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