[llvm] r357286 - [AArch64] Regenerate half precision tests

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Fri Mar 29 10:46:06 2019
New Revision: 357286

URL: http://llvm.org/viewvc/llvm-project?rev=357286&view=rev
Log:
[AArch64] Regenerate half precision tests

Prep work for PR40800 (Add UNDEF handling to SelectionDAG::FoldSetCC) 

Modified:
    llvm/trunk/test/CodeGen/AArch64/half.ll

Modified: llvm/trunk/test/CodeGen/AArch64/half.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/half.ll?rev=357286&r1=357285&r2=357286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/half.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/half.ll Fri Mar 29 10:46:06 2019
@@ -1,9 +1,12 @@
-; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
 
 define void @test_load_store(half* %in, half* %out) {
 ; CHECK-LABEL: test_load_store:
-; CHECK: ldr [[TMP:h[0-9]+]], [x0]
-; CHECK: str [[TMP]], [x1]
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ldr h0, [x0]
+; CHECK-NEXT:    str h0, [x1]
+; CHECK-NEXT:    ret
   %val = load half, half* %in
   store half %val, half* %out
   ret void
@@ -11,7 +14,9 @@ define void @test_load_store(half* %in,
 
 define i16 @test_bitcast_from_half(half* %addr) {
 ; CHECK-LABEL: test_bitcast_from_half:
-; CHECK: ldrh w0, [x0]
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ldrh w0, [x0]
+; CHECK-NEXT:    ret
   %val = load half, half* %addr
   %val_int = bitcast half %val to i16
   ret i16 %val_int
@@ -19,17 +24,19 @@ define i16 @test_bitcast_from_half(half*
 
 define i16 @test_reg_bitcast_from_half(half %in) {
 ; CHECK-LABEL: test_reg_bitcast_from_half:
-; CHECK-NOT: str
-; CHECK-NOT: ldr
-; CHECK-DAG: fmov w0, s0
-; CHECK: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $h0 killed $h0 def $s0
+; CHECK-NEXT:    fmov w0, s0
+; CHECK-NEXT:    ret
   %val = bitcast half %in to i16
   ret i16 %val
 }
 
 define void @test_bitcast_to_half(half* %addr, i16 %in) {
 ; CHECK-LABEL: test_bitcast_to_half:
-; CHECK: strh w1, [x0]
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    strh w1, [x0]
+; CHECK-NEXT:    ret
   %val_fp = bitcast i16 %in to half
   store half %val_fp, half* %addr
   ret void
@@ -37,19 +44,20 @@ define void @test_bitcast_to_half(half*
 
 define half @test_reg_bitcast_to_half(i16 %in) {
 ; CHECK-LABEL: test_reg_bitcast_to_half:
-; CHECK-NOT: str
-; CHECK-NOT: ldr
-; CHECK-DAG: fmov s0, w0
-; CHECK: ret
-
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov s0, w0
+; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
+; CHECK-NEXT:    ret
   %val = bitcast i16 %in to half
   ret half %val
 }
 
 define float @test_extend32(half* %addr) {
 ; CHECK-LABEL: test_extend32:
-; CHECK: fcvt {{s[0-9]+}}, {{h[0-9]+}}
-
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ldr h0, [x0]
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    ret
   %val16 = load half, half* %addr
   %val32 = fpext half %val16 to float
   ret float %val32
@@ -57,8 +65,10 @@ define float @test_extend32(half* %addr)
 
 define double @test_extend64(half* %addr) {
 ; CHECK-LABEL: test_extend64:
-; CHECK: fcvt {{d[0-9]+}}, {{h[0-9]+}}
-
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ldr h0, [x0]
+; CHECK-NEXT:    fcvt d0, h0
+; CHECK-NEXT:    ret
   %val16 = load half, half* %addr
   %val32 = fpext half %val16 to double
   ret double %val32
@@ -66,8 +76,10 @@ define double @test_extend64(half* %addr
 
 define void @test_trunc32(float %in, half* %addr) {
 ; CHECK-LABEL: test_trunc32:
-; CHECK: fcvt {{h[0-9]+}}, {{s[0-9]+}}
-
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvt h0, s0
+; CHECK-NEXT:    str h0, [x0]
+; CHECK-NEXT:    ret
   %val16 = fptrunc float %in to half
   store half %val16, half* %addr
   ret void
@@ -75,16 +87,31 @@ define void @test_trunc32(float %in, hal
 
 define void @test_trunc64(double %in, half* %addr) {
 ; CHECK-LABEL: test_trunc64:
-; CHECK: fcvt {{h[0-9]+}}, {{d[0-9]+}}
-
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvt h0, d0
+; CHECK-NEXT:    str h0, [x0]
+; CHECK-NEXT:    ret
   %val16 = fptrunc double %in to half
   store half %val16, half* %addr
   ret void
 }
 
 define i16 @test_fccmp(i1 %a) {
-;CHECK-LABEL: test_fccmp:
-;CHECK: fcmp
+; CHECK-LABEL: test_fccmp:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #24576
+; CHECK-NEXT:    movk w8, #15974, lsl #16
+; CHECK-NEXT:    mov w9, #16384
+; CHECK-NEXT:    movk w9, #15428, lsl #16
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    cset w8, pl
+; CHECK-NEXT:    fccmp s0, s0, #8, pl
+; CHECK-NEXT:    mov w9, #4
+; CHECK-NEXT:    csinc w9, w9, wzr, mi
+; CHECK-NEXT:    add w0, w8, w9
+; CHECK-NEXT:    ret
   %cmp0 = fcmp ogt half 0xH3333, undef
   %cmp1 = fcmp ogt half 0xH2222, undef
   %x = select i1 %cmp0, i16 0, i16 1