[PATCH] D59780: Support Intel Control-flow Enforcement Technology

Thu Mar 28 23:04:18 PDT 2019

MaskRay added a comment.

(Besides, at some point, we need some IPLT + `--require-cet` tests.)

================
Comment at: lld/ELF/Arch/X86.cpp:430
+void IntelCET::writePltHeader(uint8_t *Buf) const {
+  // SPLT[0] is a blank slot. The ABI doesn't say anything about its contents.
+  // Fill it with NOPs for now.
----------------
In the implementation of ld.bfd, I don't have 16 bytes of NOPs. I think in the ABI, `.SPLT1` is the counterpart of `.PLT1`, there is `.PLT0` (PLT header) but `.SPLT0` doesn't exist.

Also, ld.bfd uses `.plt.sec`, not `.splt`. @hjl.tools Which is the preferred name for the second PLT section?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59780/new/

https://reviews.llvm.org/D59780