[PATCH] D59971: [GlobalISel] Add legalization support for non-power-2 loads and stores
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 28 16:58:16 PDT 2019
aemerson created this revision.
aemerson added reviewers: arsenm, paquette, qcolombet, aditya_nandakumar, dsanders.
aemerson added a project: LLVM.
Herald added subscribers: Petar.Avramovic, volkan, hiraditya, javed.absar, kristof.beyls, rovka, nhaehnle, wdng, jvesely.
Legalize things like i24 load/store by splitting them into smaller power of 2 operations.
This change also adds an artifact combiner for G_INSERT -> G_EXTRACT where we can just forward the inserted value straight to the user of the extract. To do this I had to add G_INSERT to the list of artifact opcodes, and then to fix test failures where the legalization order meant that we need to try to combine them away before they're legalized, so that we don't have to look through G_TRUNC ops in between.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D59971
Files:
llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
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