[PATCH] D59405: [PowerPC] Add the support for __builtin_setrnd()
Jinsong Ji via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 28 12:17:51 PDT 2019
jsji accepted this revision.
jsji added a comment.
This revision is now accepted and ready to land.
LGTM, with some comment change please. Thanks.
================
Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1170
+
+// PowerPC get/set FPSCR Intrinsic Definitions.
+def int_ppc_setrnd : GCCBuiltin<"__builtin_setrnd">,
----------------
this is set only? remove get in comment.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10996
+ } else {
+ // Copy register from G8RCRegClass to G8RCRegclass.
+ assert((RegInfo.getRegClass(SrcReg) == &PPC::G8RCRegClass) &&
----------------
Typo? two `G8RCRegClass` here!
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11022
+
+ // Load from the stack which SrcReg stored into DestReg, so we have
+ // done the RegClass conversion from RegClass::SrcReg to
----------------
Load from the stack which SrcReg stored into DestReg => Load from the stack where SrcReg is stored, and save to DestReg
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11037
+
+ // When the operand is gprc register, using the two least significant bits
+ // of the register and mtfsf instruction to set the bits 62:63 of FPSCR.
----------------
using the two -> use two
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:1313
+// Set the float round mode
+let Uses = [RM], Defs = [RM] in {
----------------
round mode => rounding mode
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D59405/new/
https://reviews.llvm.org/D59405
More information about the llvm-commits
mailing list