[llvm] r357168 - [NFC] Format InlineFeatureIgnoreList.
Clement Courbet via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 28 06:38:58 PDT 2019
Author: courbet
Date: Thu Mar 28 06:38:58 2019
New Revision: 357168
URL: http://llvm.org/viewvc/llvm-project?rev=357168&view=rev
Log:
[NFC] Format InlineFeatureIgnoreList.
To avoid more spurious clang-format changes when adding features (D59872).
Modified:
llvm/trunk/lib/Target/X86/X86TargetTransformInfo.h
Modified: llvm/trunk/lib/Target/X86/X86TargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetTransformInfo.h?rev=357168&r1=357167&r2=357168&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetTransformInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetTransformInfo.h Thu Mar 28 06:38:58 2019
@@ -36,57 +36,58 @@ class X86TTIImpl : public BasicTTIImplBa
const X86TargetLowering *getTLI() const { return TLI; }
const FeatureBitset InlineFeatureIgnoreList = {
- // This indicates the CPU is 64 bit capable not that we are in 64-bit mode.
- X86::Feature64Bit,
-
- // These features don't have any intrinsics or ABI effect.
- X86::FeatureNOPL,
- X86::FeatureCMPXCHG16B,
- X86::FeatureLAHFSAHF,
-
- // Codegen control options.
- X86::FeatureFast11ByteNOP,
- X86::FeatureFast15ByteNOP,
- X86::FeatureFastBEXTR,
- X86::FeatureFastHorizontalOps,
- X86::FeatureFastLZCNT,
- X86::FeatureFastPartialYMMorZMMWrite,
- X86::FeatureFastScalarFSQRT,
- X86::FeatureFastSHLDRotate,
- X86::FeatureFastVariableShuffle,
- X86::FeatureFastVectorFSQRT,
- X86::FeatureLEAForSP,
- X86::FeatureLEAUsesAG,
- X86::FeatureLZCNTFalseDeps,
- X86::FeatureMacroFusion,
- X86::FeatureMergeToThreeWayBranch,
- X86::FeaturePadShortFunctions,
- X86::FeaturePOPCNTFalseDeps,
- X86::FeatureSSEUnalignedMem,
- X86::FeatureSlow3OpsLEA,
- X86::FeatureSlowDivide32,
- X86::FeatureSlowDivide64,
- X86::FeatureSlowIncDec,
- X86::FeatureSlowLEA,
- X86::FeatureSlowPMADDWD,
- X86::FeatureSlowPMULLD,
- X86::FeatureSlowSHLD,
- X86::FeatureSlowTwoMemOps,
- X86::FeatureSlowUAMem16,
-
- // Perf-tuning flags.
- X86::FeatureHasFastGather,
- X86::FeatureSlowUAMem32,
-
- // Based on whether user set the -mprefer-vector-width command line.
- X86::FeaturePrefer256Bit,
-
- // CPU name enums. These just follow CPU string.
- X86::ProcIntelAtom,
- X86::ProcIntelGLM,
- X86::ProcIntelGLP,
- X86::ProcIntelSLM,
- X86::ProcIntelTRM,
+ // This indicates the CPU is 64 bit capable not that we are in 64-bit
+ // mode.
+ X86::Feature64Bit,
+
+ // These features don't have any intrinsics or ABI effect.
+ X86::FeatureNOPL,
+ X86::FeatureCMPXCHG16B,
+ X86::FeatureLAHFSAHF,
+
+ // Codegen control options.
+ X86::FeatureFast11ByteNOP,
+ X86::FeatureFast15ByteNOP,
+ X86::FeatureFastBEXTR,
+ X86::FeatureFastHorizontalOps,
+ X86::FeatureFastLZCNT,
+ X86::FeatureFastPartialYMMorZMMWrite,
+ X86::FeatureFastScalarFSQRT,
+ X86::FeatureFastSHLDRotate,
+ X86::FeatureFastVariableShuffle,
+ X86::FeatureFastVectorFSQRT,
+ X86::FeatureLEAForSP,
+ X86::FeatureLEAUsesAG,
+ X86::FeatureLZCNTFalseDeps,
+ X86::FeatureMacroFusion,
+ X86::FeatureMergeToThreeWayBranch,
+ X86::FeaturePadShortFunctions,
+ X86::FeaturePOPCNTFalseDeps,
+ X86::FeatureSSEUnalignedMem,
+ X86::FeatureSlow3OpsLEA,
+ X86::FeatureSlowDivide32,
+ X86::FeatureSlowDivide64,
+ X86::FeatureSlowIncDec,
+ X86::FeatureSlowLEA,
+ X86::FeatureSlowPMADDWD,
+ X86::FeatureSlowPMULLD,
+ X86::FeatureSlowSHLD,
+ X86::FeatureSlowTwoMemOps,
+ X86::FeatureSlowUAMem16,
+
+ // Perf-tuning flags.
+ X86::FeatureHasFastGather,
+ X86::FeatureSlowUAMem32,
+
+ // Based on whether user set the -mprefer-vector-width command line.
+ X86::FeaturePrefer256Bit,
+
+ // CPU name enums. These just follow CPU string.
+ X86::ProcIntelAtom,
+ X86::ProcIntelGLM,
+ X86::ProcIntelGLP,
+ X86::ProcIntelSLM,
+ X86::ProcIntelTRM,
};
public:
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