[llvm] r357159 - [ARM GlobalISel] Run regbankselect test for Thumb. NFCI

[Diana Picus via llvm-commits]

Author: rovka
Date: Thu Mar 28 03:57:29 2019
New Revision: 357159

URL: http://llvm.org/viewvc/llvm-project?rev=357159&view=rev
Log:
[ARM GlobalISel] Run regbankselect test for Thumb. NFCI

This should just work, since ARM mode and Thumb2 mode are at the same
level of support now and should map the same to GPR and FPR.

Modified:
    llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir

Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir?rev=357159&r1=357158&r2=357159&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir Thu Mar 28 03:57:29 2019
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple arm-- -run-pass=regbankselect %s -o - | FileCheck %s
+# RUN: llc -mtriple thumbv7-- -run-pass=regbankselect %s -o - | FileCheck %s
 --- |
   define void @test_add_s32() { ret void }
   define void @test_sub_s32() { ret void }
@@ -83,7 +84,7 @@
   define void @test_soft_fp_s64() #0 { ret void }
 
   attributes #0 = { "target-features"="+vfp2"}
-  attributes #1 = { "target-features"="+hwdiv-arm" }
+  attributes #1 = { "target-features"="+hwdiv-arm,+hwdiv" }
   attributes #2 = { "target-features"="+vfp4"}
   attributes #3 = { "target-features"="+v5t"}
 ...