[llvm] r357094 - [AArch64][SVE] Asm: error on unexpected SVE vector register type suffix

[Sander de Smalen via llvm-commits]

Author: s.desmalen
Date: Wed Mar 27 10:23:38 2019
New Revision: 357094

URL: http://llvm.org/viewvc/llvm-project?rev=357094&view=rev
Log:
[AArch64][SVE] Asm: error on unexpected SVE vector register type suffix

This patch fixes an assembler bug that allowed SVE vector registers to contain a
type suffix when not expected. The SVE unpredicated movprfx instruction is the
only instruction affected.

The following are examples of what was previously valid:

    movprfx z0.b, z0.b
    movprfx z0.b, z0.s
    movprfx z0, z0.s

These instructions are now erroneous.

Patch by Cullen Rhodes (c-rhodes)

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D59636

Modified:
    llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    llvm/trunk/test/MC/AArch64/SVE/ldr-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE/str-diagnostics.s

Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=357094&r1=357093&r2=357094&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Wed Mar 27 10:23:38 2019
@@ -1090,8 +1090,7 @@ public:
     if (Kind != k_Register || Reg.Kind != RegKind::SVEDataVector)
       return DiagnosticPredicateTy::NoMatch;
 
-    if (isSVEVectorReg<Class>() &&
-           (ElementWidth == 0 || Reg.ElementWidth == ElementWidth))
+    if (isSVEVectorReg<Class>() && Reg.ElementWidth == ElementWidth)
       return DiagnosticPredicateTy::Match;
 
     return DiagnosticPredicateTy::NearMatch;
@@ -4442,7 +4441,7 @@ bool AArch64AsmParser::showMatchError(SM
   case Match_InvalidZPR64LSL64:
     return Error(Loc, "invalid shift/extend specified, expected 'z[0..31].d, lsl #3'");
   case Match_InvalidZPR0:
-    return Error(Loc, "expected register without element width sufix");
+    return Error(Loc, "expected register without element width suffix");
   case Match_InvalidZPR8:
   case Match_InvalidZPR16:
   case Match_InvalidZPR32:

Modified: llvm/trunk/test/MC/AArch64/SVE/ldr-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldr-diagnostics.s?rev=357094&r1=357093&r2=357094&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldr-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldr-diagnostics.s Wed Mar 27 10:23:38 2019
@@ -22,3 +22,11 @@ ldr z0, [x0, #256, MUL VL]
 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
 // CHECK-NEXT: ldr z0, [x0, #256, MUL VL]
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Unexpected element width suffix
+
+ldr z0.b, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected register without element width suffix
+// CHECK-NEXT: ldr z0.b, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Modified: llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s?rev=357094&r1=357093&r2=357094&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s Wed Mar 27 10:23:38 2019
@@ -1,6 +1,25 @@
 // RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve  2>&1 < %s | FileCheck %s
 
 // ------------------------------------------------------------------------- //
+// Type suffix on unpredicated movprfx
+
+movprfx z0.b, z1.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: movprfx z0.b, z1.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.b, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: movprfx z0.b, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected register without element width suffix
+// CHECK-NEXT: movprfx z0, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
 // Different destination register (unary)
 
 movprfx z0, z1

Modified: llvm/trunk/test/MC/AArch64/SVE/str-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/str-diagnostics.s?rev=357094&r1=357093&r2=357094&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/str-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/str-diagnostics.s Wed Mar 27 10:23:38 2019
@@ -22,3 +22,11 @@ str z0, [x0, #256, MUL VL]
 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
 // CHECK-NEXT: str z0, [x0, #256, MUL VL]
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Unexpected element width suffix
+
+str z0.b, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected register without element width suffix
+// CHECK-NEXT: str z0.b, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: