[PATCH] D56201: [LegalizeVectorTypes] Allow single loads and stores for more short vectors

[Guillaume Marques via Phabricator via llvm-commits]

tauril updated this revision to Diff 192460.
tauril added a comment.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

Hello @bogner, thanks for accepting this patch!

> 1. We hit an assertion in test/CodeGen/AMDGPU/kernel-args.ll. Can you take a look?

The problem came from the `R600ISelLowering` where apparently the global addresspace is not supported for vector truncating stores. (@jvesely would it be possible that you have a look on the changes I made in `R600ISelLowering.cpp` to avoid the assert?). The failing test (`v5i16_arg`) was introduced in https://reviews.llvm.org/D58928 by @tpr.

> 2. I don't have test/CodeGen/X86/load-local-v3i1.ll in my tree, so that part doesn't apply. Is it reasonable to drop this part of the change?

About that, it was requested by @lebedev.ri to have the file pre-committed to see how my modifications changed it. I've now removed the pre-committed file so that it is created by this patch.

> 3. A couple of the X86 tests have changed slightly - these are easy enough to upgrade with update_llc_test_checks though.

I have updated the tests accordingly!

I also ran `ninja check-llvm` on a build with asserts activated to ensure everything passed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56201/new/

https://reviews.llvm.org/D56201

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
  llvm/test/CodeGen/AMDGPU/load-global-i16.ll
  llvm/test/CodeGen/AMDGPU/load-local-i16.ll
  llvm/test/CodeGen/X86/load-local-v3i1.ll
  llvm/test/CodeGen/X86/widen_arith-3.ll
  llvm/test/CodeGen/X86/widen_cast-2.ll
  llvm/test/CodeGen/X86/widen_cast-3.ll
  llvm/test/CodeGen/X86/widen_load-2.ll

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