[llvm] r357000 - [MCA] Correctly update the UsedResourceGroups mask in the InstrBuilder.

[Andrea Di Biagio via llvm-commits]

Author: adibiagio
Date: Tue Mar 26 08:38:37 2019
New Revision: 357000

URL: http://llvm.org/viewvc/llvm-project?rev=357000&view=rev
Log:
[MCA] Correctly update the UsedResourceGroups mask in the InstrBuilder.

Found by inspection when looking at the debug output of MCA.
This problem was latent, and none of the upstream models were affected by it.
No functional change intended.

Modified:
    llvm/trunk/include/llvm/MCA/Stages/DispatchStage.h
    llvm/trunk/lib/MCA/InstrBuilder.cpp
    llvm/trunk/lib/MCA/Stages/DispatchStage.cpp
    llvm/trunk/tools/llvm-mca/Views/SummaryView.cpp
    llvm/trunk/tools/llvm-mca/llvm-mca.cpp

Modified: llvm/trunk/include/llvm/MCA/Stages/DispatchStage.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MCA/Stages/DispatchStage.h?rev=357000&r1=356999&r2=357000&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MCA/Stages/DispatchStage.h (original)
+++ llvm/trunk/include/llvm/MCA/Stages/DispatchStage.h Tue Mar 26 08:38:37 2019
@@ -68,9 +68,7 @@ class DispatchStage final : public Stage
 public:
   DispatchStage(const MCSubtargetInfo &Subtarget, const MCRegisterInfo &MRI,
                 unsigned MaxDispatchWidth, RetireControlUnit &R,
-                RegisterFile &F)
-      : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth),
-        CarryOver(0U), CarriedOver(), STI(Subtarget), RCU(R), PRF(F) {}
+                RegisterFile &F);
 
   bool isAvailable(const InstRef &IR) const override;
 

Modified: llvm/trunk/lib/MCA/InstrBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MCA/InstrBuilder.cpp?rev=357000&r1=356999&r2=357000&view=diff
==============================================================================
--- llvm/trunk/lib/MCA/InstrBuilder.cpp (original)
+++ llvm/trunk/lib/MCA/InstrBuilder.cpp Tue Mar 26 08:38:37 2019
@@ -115,6 +115,7 @@ static void initializeUsedResources(Inst
     } else {
       // Remove the leading 1 from the resource group mask.
       NormalizedMask ^= PowerOf2Floor(NormalizedMask);
+      UsedResourceGroups |= (A.first ^ NormalizedMask);
     }
 
     for (unsigned J = I + 1; J < E; ++J) {

Modified: llvm/trunk/lib/MCA/Stages/DispatchStage.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MCA/Stages/DispatchStage.cpp?rev=357000&r1=356999&r2=357000&view=diff
==============================================================================
--- llvm/trunk/lib/MCA/Stages/DispatchStage.cpp (original)
+++ llvm/trunk/lib/MCA/Stages/DispatchStage.cpp Tue Mar 26 08:38:37 2019
@@ -25,6 +25,16 @@
 namespace llvm {
 namespace mca {
 
+DispatchStage::DispatchStage(const MCSubtargetInfo &Subtarget,
+                             const MCRegisterInfo &MRI,
+                             unsigned MaxDispatchWidth, RetireControlUnit &R,
+                             RegisterFile &F)
+    : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth),
+      CarryOver(0U), CarriedOver(), STI(Subtarget), RCU(R), PRF(F) {
+  if (!DispatchWidth)
+    DispatchWidth = Subtarget.getSchedModel().IssueWidth;
+}
+
 void DispatchStage::notifyInstructionDispatched(const InstRef &IR,
                                                 ArrayRef<unsigned> UsedRegs,
                                                 unsigned UOps) const {

Modified: llvm/trunk/tools/llvm-mca/Views/SummaryView.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/Views/SummaryView.cpp?rev=357000&r1=356999&r2=357000&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/Views/SummaryView.cpp (original)
+++ llvm/trunk/tools/llvm-mca/Views/SummaryView.cpp Tue Mar 26 08:38:37 2019
@@ -24,7 +24,8 @@ namespace mca {
 
 SummaryView::SummaryView(const MCSchedModel &Model, ArrayRef<MCInst> S,
                          unsigned Width, bool EmitBottleneckAnalysis)
-    : SM(Model), Source(S), DispatchWidth(Width), LastInstructionIdx(0),
+    : SM(Model), Source(S), DispatchWidth(Width?Width: Model.IssueWidth),
+      LastInstructionIdx(0),
       TotalCycles(0), NumMicroOps(0), BPI({0, 0, 0, 0, 0}),
       ResourcePressureDistribution(Model.getNumProcResourceKinds(), 0),
       ProcResourceUsage(Model.getNumProcResourceKinds(), 0),

Modified: llvm/trunk/tools/llvm-mca/llvm-mca.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/llvm-mca.cpp?rev=357000&r1=356999&r2=357000&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/llvm-mca.cpp (original)
+++ llvm/trunk/tools/llvm-mca/llvm-mca.cpp Tue Mar 26 08:38:37 2019
@@ -381,17 +381,13 @@ int main(int argc, char **argv) {
 
   const MCSchedModel &SM = STI->getSchedModel();
 
-  unsigned Width = SM.IssueWidth;
-  if (DispatchWidth)
-    Width = DispatchWidth;
-
   // Create an instruction builder.
   mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());
 
   // Create a context to control ownership of the pipeline hardware.
   mca::Context MCA(*MRI, *STI);
 
-  mca::PipelineOptions PO(Width, RegisterFileSize, LoadQueueSize,
+  mca::PipelineOptions PO(DispatchWidth, RegisterFileSize, LoadQueueSize,
                           StoreQueueSize, AssumeNoAlias,
                           EnableBottleneckAnalysis);
 
@@ -470,7 +466,7 @@ int main(int argc, char **argv) {
 
     if (PrintSummaryView)
       Printer.addView(llvm::make_unique<mca::SummaryView>(
-          SM, Insts, Width, EnableBottleneckAnalysis));
+          SM, Insts, DispatchWidth, EnableBottleneckAnalysis));
 
     if (PrintInstructionInfoView)
       Printer.addView(