[PATCH] D58712: Changes for Installing SwiftPM for Apple Swift 5 Toolchain on PowerPC64LE

[Sarvesh Tamba via Phabricator via llvm-commits]

sarveshtamba added a comment.

Investigated more on this and found that the following assert statement which throws up this error might be wrongly computed:-

  		  assert(!(InputsAreConsecutiveLoads && InputsAreReverseConsecutive) &&
  				 "The loads cannot be both consecutive and reverse consecutive.");
  				 

Both variables 'InputsAreConsecutiveLoads' and 'InputsAreReverseConsecutive' are computed based on the return value from 'isConsecutiveLS' function.
The 'isConsecutiveLS' function definition mentions in comments that it is "Like SelectionDAG::isConsecutiveLoad", which "Return true if LD is loading 'Bytes' bytes from a location that is 'Dist' units away from the location that the 'Base' load is loading from."

Based on this, both variables 'InputsAreConsecutiveLoads' and 'InputsAreReverseConsecutive' which are initialised to 'true', are set to 'false' if the return value of 'isConsecutiveLS' function is false i.e. if the loads are not consecutive or reverse consecutive respectively.

Further we do "Exit early if the loads are neither consecutive nor reverse consecutive.":-

  if (!InputsAreConsecutiveLoads && !InputsAreReverseConsecutive)
    return SDValue();

To summarise:-
InputsAreConsecutiveLoads 	== true		=>	Loads are consecutive
InputsAreReverseConsecutive	== true		=>	Loads are reverse consecutive

InputsAreConsecutiveLoads 	== false	=>	Loads are NOT consecutive
InputsAreReverseConsecutive	== false	=>	Loads are NOT reverse consecutive

Based on this, the assert statement in question should have been the following:-

  		  assert((InputsAreConsecutiveLoads && InputsAreReverseConsecutive) &&
  				 "The loads cannot be both consecutive and reverse consecutive.");
  				 

Please correct if I am missing anything.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D58712/new/

https://reviews.llvm.org/D58712