[PATCH] D59699: [RISCV] Optimize selection of fcmp one and fcmp ord

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 added inline comments.


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Comment at: lib/Target/RISCV/RISCVInstrInfoD.td:278
 
+def : Pat<(xor (setuo FPR64:$rs1, FPR64:$rs2), 1),
+          (AND (FEQ_D FPR64:$rs1, FPR64:$rs1),
----------------
This looks to me as logically the same as `seto`.

So we can make it legal (for F and D) in `RISCVISelLowering.cpp` (now it is marked as `Expand`) and use this pattern as its expansion.


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Comment at: lib/Target/RISCV/RISCVInstrInfoF.td:332
 
+def : Pat<(xor (setuo FPR32:$rs1, FPR32:$rs2), 1),
+          (AND (FEQ_S FPR32:$rs1, FPR32:$rs1),
----------------
Ditto.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59699/new/

https://reviews.llvm.org/D59699