[PATCH] D59733: ARM: Allow cp10/cp11 coprocessor register access with a warning

[Peter Smith via Phabricator via llvm-commits]

peter.smith added a comment.

I prefer having the warning here as there are use cases for using the coprocessor interface for VFP instructions, notably when access to the instructions is gated at run-time and the same source needs to assemble on multiple targets. From what I can see the mrc in venum_read_pmresr() is not a VFP/Neon instruction. It hails from arch/arm/kernel/perf_event_v7.c and is specific to Qualcomm's Scorpion and Krait CPUs. My understanding is that CP15 is used for the PMU in v7, it is possible that the use of p10 there is a mistake but I'm not knowledgeable enough about Scorpion and Krait to know whether this is the case.

You'll need to update test/MC/ARM/diagnostics.s  as this is currently failing with this patch as it tests whether the old error message is being produced. You can run the tests from the build directory with make/ninja check-llvm. To run an individual test with output then from the build dir: bin/llvm-lit -v -a  /path/to/llvm/test/MC/ARM/diagnostics.s


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59733/new/

https://reviews.llvm.org/D59733