[llvm] r356760 - [x86] auto-generate complete checks for test; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 22 08:33:47 PDT 2019
Author: spatel
Date: Fri Mar 22 08:33:47 2019
New Revision: 356760
URL: http://llvm.org/viewvc/llvm-project?rev=356760&view=rev
Log:
[x86] auto-generate complete checks for test; NFC
Modified:
llvm/trunk/test/CodeGen/X86/cmov-double.ll
Modified: llvm/trunk/test/CodeGen/X86/cmov-double.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmov-double.ll?rev=356760&r1=356759&r2=356760&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmov-double.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmov-double.ll Fri Mar 22 08:33:47 2019
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -o - %s | FileCheck %s
target triple = "x86_64-unknown-unknown"
@@ -5,12 +6,14 @@ target triple = "x86_64-unknown-unknown"
; cmovs, not by producing two conditions and using and on them.
define i32 @select_and(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) {
-; CHECK-LABEL: select_and
-; CHECK-NOT: set
-; CHECK-NOT: and[lb]
-; CHECK-NOT: test
-; CHECK: cmov
-; CHECK: cmov
+; CHECK-LABEL: select_and:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %edx, %eax
+; CHECK-NEXT: ucomiss %xmm0, %xmm1
+; CHECK-NEXT: cmovbel %ecx, %eax
+; CHECK-NEXT: cmpl %esi, %edi
+; CHECK-NEXT: cmovael %ecx, %eax
+; CHECK-NEXT: retq
%cmp0 = icmp ult i32 %a0, %a1
%cmp1 = fcmp olt float %a2, %a3
%and = and i1 %cmp0, %cmp1
@@ -18,15 +21,18 @@ define i32 @select_and(i32 %a0, i32 %a1,
ret i32 %res
}
-define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) {
; select with and i1 condition should be implemented as a series of 2 cmovs, not
; by producing two conditions and using and on them.
-; CHECK-LABEL: select_or
-; CHECK-NOT: set
-; CHECK-NOT: or[lb]
-; CHECK-NOT: test
-; CHECK: cmov
-; CHECK: cmov
+
+define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) {
+; CHECK-LABEL: select_or:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %ecx, %eax
+; CHECK-NEXT: ucomiss %xmm0, %xmm1
+; CHECK-NEXT: cmoval %edx, %eax
+; CHECK-NEXT: cmpl %esi, %edi
+; CHECK-NEXT: cmovbl %edx, %eax
+; CHECK-NEXT: retq
%cmp0 = icmp ult i32 %a0, %a1
%cmp1 = fcmp olt float %a2, %a3
%and = or i1 %cmp0, %cmp1
@@ -39,9 +45,19 @@ define i32 @select_or(i32 %a0, i32 %a1,
@var32 = global i32 0
define i32 @select_noopt(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
-; CHECK-LABEL: select_noopt
-; CHECK: cmov
-; CHECK-NOT: cmov
+; CHECK-LABEL: select_noopt:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %ecx, %eax
+; CHECK-NEXT: cmpl %esi, %edi
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: cmpl %edx, %esi
+; CHECK-NEXT: setb %dl
+; CHECK-NEXT: orb %cl, %dl
+; CHECK-NEXT: movzbl %dl, %ecx
+; CHECK-NEXT: movl %ecx, {{.*}}(%rip)
+; CHECK-NEXT: testb %cl, %cl
+; CHECK-NEXT: cmovel %r8d, %eax
+; CHECK-NEXT: retq
%cmp0 = icmp ult i32 %a0, %a1
%cmp1 = icmp ult i32 %a1, %a2
%or = or i1 %cmp0, %cmp1
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