[PATCH] D59679: [X86] Use movq for i64 atomic load on 32-bit targets when sse2 is enable

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

>From what I understand, the atomic marking in the memory operand should be enough (assuming there aren't any relevant target-specific DAGCombines).

Maybe also add CHECK lines to test/CodeGen/X86/atomic-non-integer.ll?



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Comment at: llvm/test/CodeGen/X86/atomic-load-store-wide.ll:41
+; CHECK-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT:    movd %xmm0, %eax
+; CHECK-NEXT:    pextrd $1, %xmm0, %edx
----------------
Maybe we should keep test coverage for old CPUs?  Or is that unlikely to be useful?


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  https://reviews.llvm.org/D59679/new/

https://reviews.llvm.org/D59679