[PATCH] D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

The IR at this



================
Comment at: llvm/lib/IR/AutoUpgrade.cpp:574
+      if (ArgTy->getElementType()->isFloatingPointTy()) {
+        auto fArgs = F->getFunctionType()->params();
+        Type *Tys[] = {fArgs[0], fArgs[1]};
----------------
aemerson wrote:
> efriedma wrote:
> > This code is weird... you're computing the types in two different ways.  Also, missing a check for F->arg_size() (so we don't crash on invalid IR).
> I'll consolidate the logic, but none of the other code here checks for IR validity. By the time we reach here the IR should be valid, we're just translating it to a newer version. I can put an assert anyway.
The IR during autoupgrade should be loosely "valid", to the point of passing the asm/bitcode parser, but we don't check the signature of intrinsics until later, so someone could write `declare <4 x float> @llvm.aarch64.neon.addp.v4f32()`.


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