[llvm] r356688 - [X86] Don't avoid folding multiple use sign extended 8-bit immediate into instructions under optsize.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 21 10:38:58 PDT 2019
Author: ctopper
Date: Thu Mar 21 10:38:58 2019
New Revision: 356688
URL: http://llvm.org/viewvc/llvm-project?rev=356688&view=rev
Log:
[X86] Don't avoid folding multiple use sign extended 8-bit immediate into instructions under optsize.
Under optsize we try to avoid folding immediates into instructions under optsize. But if the immediate is 16-bits or 32 bits, but can be encoded as an 8-bit immediate we don't save enough from disabling the folding unless the immediate has enough uses to make up for the size of the move which is either 3 bytes or 5 bytes since there are no sign extended 8-bit moves. We would also save something if the immediate was a live out of the basic block and thus a move was unavoidable, but that would require a more advanced heuristic than just counting uses.
Note we only avoid folding multiple use immediates into the patterns that use X86ISD::ADD/SUB/XOR/OR/AND/CMP/ADC/SBB nodes and not the more common ISD::ADD/SUB/XOR/OR/AND nodes.
Differential Revision: https://reviews.llvm.org/D59522
Modified:
llvm/trunk/lib/Target/X86/X86InstrArithmetic.td
llvm/trunk/lib/Target/X86/X86InstrCompiler.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/test/CodeGen/X86/immediate_merging.ll
llvm/trunk/test/CodeGen/X86/immediate_merging64.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrArithmetic.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrArithmetic.td?rev=356688&r1=356687&r2=356688&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrArithmetic.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrArithmetic.td Thu Mar 21 10:38:58 2019
@@ -605,13 +605,13 @@ def Xi8 : X86TypeInfo<i8, "b", GR8, loa
Imm8, i8imm, relocImm8_su, i8imm, invalid_node,
0, OpSizeFixed, 0>;
def Xi16 : X86TypeInfo<i16, "w", GR16, loadi16, i16mem,
- Imm16, i16imm, relocImm16_su, i16i8imm, i16immSExt8_su,
+ Imm16, i16imm, relocImm16_su, i16i8imm, i16immSExt8,
1, OpSize16, 0>;
def Xi32 : X86TypeInfo<i32, "l", GR32, loadi32, i32mem,
- Imm32, i32imm, relocImm32_su, i32i8imm, i32immSExt8_su,
+ Imm32, i32imm, relocImm32_su, i32i8imm, i32immSExt8,
1, OpSize32, 0>;
def Xi64 : X86TypeInfo<i64, "q", GR64, loadi64, i64mem,
- Imm32S, i64i32imm, i64relocImmSExt32_su, i64i8imm, i64immSExt8_su,
+ Imm32S, i64i32imm, i64relocImmSExt32_su, i64i8imm, i64immSExt8,
1, OpSizeFixed, 1>;
/// ITy - This instruction base class takes the type info for the instruction.
Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=356688&r1=356687&r2=356688&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Thu Mar 21 10:38:58 2019
@@ -1994,8 +1994,8 @@ def : Pat<(X86sub_flag 0, GR32:$src), (N
def : Pat<(X86sub_flag 0, GR64:$src), (NEG64r GR64:$src)>;
// sub reg, relocImm
-def : Pat<(X86sub_flag GR64:$src1, i64relocImmSExt8_su:$src2),
- (SUB64ri8 GR64:$src1, i64relocImmSExt8_su:$src2)>;
+def : Pat<(X86sub_flag GR64:$src1, i64relocImmSExt8:$src2),
+ (SUB64ri8 GR64:$src1, i64relocImmSExt8:$src2)>;
// mul reg, reg
def : Pat<(mul GR16:$src1, GR16:$src2),
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=356688&r1=356687&r2=356688&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Mar 21 10:38:58 2019
@@ -1004,19 +1004,6 @@ def relocImm32_su : PatLeaf<(i32 relocIm
return !shouldAvoidImmediateInstFormsForSize(N);
}]>;
-def i16immSExt8_su : PatLeaf<(i16immSExt8), [{
- return !shouldAvoidImmediateInstFormsForSize(N);
-}]>;
-def i32immSExt8_su : PatLeaf<(i32immSExt8), [{
- return !shouldAvoidImmediateInstFormsForSize(N);
-}]>;
-def i64immSExt8_su : PatLeaf<(i64immSExt8), [{
- return !shouldAvoidImmediateInstFormsForSize(N);
-}]>;
-
-def i64relocImmSExt8_su : PatLeaf<(i64relocImmSExt8), [{
- return !shouldAvoidImmediateInstFormsForSize(N);
-}]>;
def i64relocImmSExt32_su : PatLeaf<(i64relocImmSExt32), [{
return !shouldAvoidImmediateInstFormsForSize(N);
}]>;
Modified: llvm/trunk/test/CodeGen/X86/immediate_merging.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/immediate_merging.ll?rev=356688&r1=356687&r2=356688&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/immediate_merging.ll (original)
+++ llvm/trunk/test/CodeGen/X86/immediate_merging.ll Thu Mar 21 10:38:58 2019
@@ -19,9 +19,8 @@ define i32 @foo() optsize {
; X86-NEXT: movl $1234, %eax # imm = 0x4D2
; X86-NEXT: movl %eax, a
; X86-NEXT: movl %eax, b
-; X86-NEXT: movl $12, %eax
-; X86-NEXT: movl %eax, c
-; X86-NEXT: cmpl %eax, e
+; X86-NEXT: movl $12, c
+; X86-NEXT: cmpl $12, e
; X86-NEXT: jne .LBB0_2
; X86-NEXT: # %bb.1: # %if.then
; X86-NEXT: movl $1, x
@@ -38,9 +37,8 @@ define i32 @foo() optsize {
; X64-NEXT: movl $1234, %eax # imm = 0x4D2
; X64-NEXT: movl %eax, {{.*}}(%rip)
; X64-NEXT: movl %eax, {{.*}}(%rip)
-; X64-NEXT: movl $12, %eax
-; X64-NEXT: movl %eax, {{.*}}(%rip)
-; X64-NEXT: cmpl %eax, {{.*}}(%rip)
+; X64-NEXT: movl $12, {{.*}}(%rip)
+; X64-NEXT: cmpl $12, {{.*}}(%rip)
; X64-NEXT: jne .LBB0_2
; X64-NEXT: # %bb.1: # %if.then
; X64-NEXT: movl $1, {{.*}}(%rip)
Modified: llvm/trunk/test/CodeGen/X86/immediate_merging64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/immediate_merging64.ll?rev=356688&r1=356687&r2=356688&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/immediate_merging64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/immediate_merging64.ll Thu Mar 21 10:38:58 2019
@@ -11,7 +11,7 @@ define i1 @imm_multiple_users(i64 %a, i6
; CHECK: # %bb.0:
; CHECK-NEXT: movq $-1, %rax
; CHECK-NEXT: movq %rax, (%rsi)
-; CHECK-NEXT: cmpq %rax, %rdi
+; CHECK-NEXT: cmpq $-1, %rdi
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
store i64 -1, i64* %b, align 8
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