[llvm] r356656 - [SelectionDAG] Add scalarization of ABS node (PR41149)

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Mar 21 04:18:54 2019
New Revision: 356656

URL: http://llvm.org/viewvc/llvm-project?rev=356656&view=rev
Log:
[SelectionDAG] Add scalarization of ABS node (PR41149)

Patch by: @ikulagin (Ivan Kulagin)

Differential Revision: https://reviews.llvm.org/D59577

Added:
    llvm/trunk/test/CodeGen/WebAssembly/PR41149.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=356656&r1=356655&r2=356656&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Thu Mar 21 04:18:54 2019
@@ -68,6 +68,7 @@ void DAGTypeLegalizer::ScalarizeVectorRe
   case ISD::ZERO_EXTEND_VECTOR_INREG:
     R = ScalarizeVecRes_VecInregOp(N);
     break;
+  case ISD::ABS:
   case ISD::ANY_EXTEND:
   case ISD::BITREVERSE:
   case ISD::BSWAP:

Added: llvm/trunk/test/CodeGen/WebAssembly/PR41149.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/PR41149.ll?rev=356656&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/PR41149.ll (added)
+++ llvm/trunk/test/CodeGen/WebAssembly/PR41149.ll Thu Mar 21 04:18:54 2019
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=wasm32-unknown-unknown | FileCheck %s
+
+; Regression test for PR41149.
+
+define void @mod() {
+; CHECK-LABEL: mod:
+; CHECK-NEXT: .functype mod () -> ()
+; CHECK:      local.get       0
+; CHECK-NEXT: local.get       0
+; CHECK-NEXT: i32.load8_s     0
+; CHECK-NEXT: local.tee       0
+; CHECK-NEXT: local.get       0
+; CHECK-NEXT: i32.const       31
+; CHECK-NEXT: i32.shr_s
+; CHECK-NEXT: local.tee       0
+; CHECK-NEXT: i32.add
+; CHECK-NEXT: local.get       0
+; CHECK-NEXT: i32.xor
+; CHECK-NEXT: i32.store8      0
+  %tmp = load <4 x i8>, <4 x i8>* undef
+  %tmp2 = icmp slt <4 x i8> %tmp, zeroinitializer
+  %tmp3 = sub <4 x i8> zeroinitializer, %tmp
+  %tmp4 = select <4 x i1> %tmp2, <4 x i8> %tmp3, <4 x i8> %tmp
+  store <4 x i8> %tmp4, <4 x i8>* undef
+  ret void
+}
+