[PATCH] D59470: [RISCV] Add basic RV32E definitions and MC layer support
Ana Pazos via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 20 14:52:49 PDT 2019
apazos added inline comments.
Herald added a subscriber: benna.
================
Comment at: lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp:78
+
+ if (RegNo > array_lengthof(GPRDecoderTable) || (IsRV32E && RegNo > 15))
return MCDisassembler::Fail;
----------------
This RegNo is the index to the table, not the value RISCV::X*. But in RISCVAsmParser.cpp matchRegisterNameHelpe and ParseRegister RegNo is that value. Maybe it should be called just Reg in those functions to avoid confusion
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rL LLVM
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https://reviews.llvm.org/D59470/new/
https://reviews.llvm.org/D59470
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