[llvm] r356559 - [CGP][x86] add tests for usubo regression (PR41129); NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Mar 20 08:02:35 2019
New Revision: 356559

URL: http://llvm.org/viewvc/llvm-project?rev=356559&view=rev
Log:
[CGP][x86] add tests for usubo regression (PR41129); NFC

Modified:
    llvm/trunk/test/CodeGen/X86/cgp-usubo.ll
    llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll

Modified: llvm/trunk/test/CodeGen/X86/cgp-usubo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cgp-usubo.ll?rev=356559&r1=356558&r2=356559&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cgp-usubo.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cgp-usubo.ll Wed Mar 20 08:02:35 2019
@@ -207,3 +207,35 @@ end:
   ret i1 %ov
 }
 
+define void @PR41129(i64* %p64) {
+; CHECK-LABEL: PR41129:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq (%rdi), %rax
+; CHECK-NEXT:    movq %rax, %rcx
+; CHECK-NEXT:    subq $1, %rcx
+; CHECK-NEXT:    jae .LBB10_1
+; CHECK-NEXT:  # %bb.2: # %true
+; CHECK-NEXT:    movq %rcx, (%rdi)
+; CHECK-NEXT:    retq
+; CHECK-NEXT:  .LBB10_1: # %false
+; CHECK-NEXT:    andl $7, %eax
+; CHECK-NEXT:    movq %rax, (%rdi)
+; CHECK-NEXT:    retq
+entry:
+  %key = load i64, i64* %p64, align 8
+  %cond17 = icmp eq i64 %key, 0
+  br i1 %cond17, label %true, label %false
+
+false:
+  %andval = and i64 %key, 7
+  store i64 %andval, i64* %p64
+  br label %exit
+
+true:
+  %svalue = add i64 %key, -1
+  store i64 %svalue, i64* %p64
+  br label %exit
+
+exit:
+  ret void
+}

Modified: llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll?rev=356559&r1=356558&r2=356559&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll (original)
+++ llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll Wed Mar 20 08:02:35 2019
@@ -475,6 +475,45 @@ define i64 @foo2(i8 *%p) {
   ret i64 %sub
 }
 
+; When the compare operand has uses besides add/sub,
+; the transform may not be profitable.
+
+define void @PR41129(i64* %p64) {
+; CHECK-LABEL: @PR41129(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[KEY:%.*]] = load i64, i64* [[P64:%.*]], align 8
+; CHECK-NEXT:    [[TMP0:%.*]] = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 [[KEY]], i64 1)
+; CHECK-NEXT:    [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP0]], 0
+; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i64, i1 } [[TMP0]], 1
+; CHECK-NEXT:    br i1 [[OV]], label [[TRUE:%.*]], label [[FALSE:%.*]]
+; CHECK:       false:
+; CHECK-NEXT:    [[ANDVAL:%.*]] = and i64 [[KEY]], 7
+; CHECK-NEXT:    store i64 [[ANDVAL]], i64* [[P64]]
+; CHECK-NEXT:    br label [[EXIT:%.*]]
+; CHECK:       true:
+; CHECK-NEXT:    store i64 [[MATH]], i64* [[P64]]
+; CHECK-NEXT:    br label [[EXIT]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %key = load i64, i64* %p64, align 8
+  %cond17 = icmp eq i64 %key, 0
+  br i1 %cond17, label %true, label %false
+
+false:
+  %andval = and i64 %key, 7
+  store i64 %andval, i64* %p64
+  br label %exit
+
+true:
+  %svalue = add i64 %key, -1
+  store i64 %svalue, i64* %p64
+  br label %exit
+
+exit:
+  ret void
+}
 
 ; Check that every instruction inserted by -codegenprepare has a debug location.
 ; DEBUG: CheckModuleDebugify: PASS