[PATCH] D59566: [X86] Correct the value of MaxAtomicInlineWidth for pre-586 cpus
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 19 14:54:42 PDT 2019
craig.topper created this revision.
craig.topper added reviewers: efriedma, jfb.
craig.topper added a subscriber: erichkeane.
MaxAtomicInlineWidth should be 32 bits on CPUs prior to 586 when CMPXCHG8B was added.
The test changes just add -target-cpu pentium4 as a post-586 chip to keep the content working. I believe pentium4 is the default CPU we use in the driver for at least 32-bit linux.
What's the minimum test needed to ensure that 386/486 CPUs get the right value?
https://reviews.llvm.org/D59566
Files:
clang/lib/Basic/Targets/X86.h
clang/test/CodeGen/atomic-ops.c
clang/test/Preprocessor/init.c
clang/test/Sema/atomic-ops.c
Index: clang/test/Sema/atomic-ops.c
===================================================================
--- clang/test/Sema/atomic-ops.c
+++ clang/test/Sema/atomic-ops.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -verify -ffreestanding -fsyntax-only -triple=i686-linux-gnu -std=c11
+// RUN: %clang_cc1 %s -verify -ffreestanding -fsyntax-only -triple=i686-linux-gnu -std=c11 -target-cpu pentium4
// Basic parsing/Sema tests for __c11_atomic_*
Index: clang/test/Preprocessor/init.c
===================================================================
--- clang/test/Preprocessor/init.c
+++ clang/test/Preprocessor/init.c
@@ -10083,7 +10083,7 @@
// AVR:#define __WINT_TYPE__ int
-// RUN: %clang_cc1 -E -dM -ffreestanding \
+// RUN: %clang_cc1 -E -dM -ffreestanding -target-cpu pentium4 \
// RUN: -triple i686-windows-msvc -fms-compatibility -x c++ < /dev/null \
// RUN: | FileCheck -match-full-lines -check-prefix MSVC-X32 %s
Index: clang/test/CodeGen/atomic-ops.c
===================================================================
--- clang/test/CodeGen/atomic-ops.c
+++ clang/test/CodeGen/atomic-ops.c
@@ -1,10 +1,10 @@
-// RUN: %clang_cc1 %s -emit-llvm -o - -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 | FileCheck %s
+// RUN: %clang_cc1 %s -emit-llvm -o - -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 -target-cpu pentium4 | FileCheck %s
// REQUIRES: x86-registered-target
// Also test serialization of atomic operations here, to avoid duplicating the
// test.
-// RUN: %clang_cc1 %s -emit-pch -o %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9
-// RUN: %clang_cc1 %s -include-pch %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 %s -emit-pch -o %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 -target-cpu pentium4
+// RUN: %clang_cc1 %s -include-pch %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 -target-cpu pentium4 -emit-llvm -o - | FileCheck %s
#ifndef ALREADY_INCLUDED
#define ALREADY_INCLUDED
Index: clang/lib/Basic/Targets/X86.h
===================================================================
--- clang/lib/Basic/Targets/X86.h
+++ clang/lib/Basic/Targets/X86.h
@@ -346,9 +346,8 @@
(1 << TargetInfo::LongDouble));
// x86-32 has atomics up to 8 bytes
- // FIXME: Check that we actually have cmpxchg8b before setting
- // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
- MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
+ MaxAtomicPromoteWidth = 64;
+ MaxAtomicInlineWidth = 32;
}
BuiltinVaListKind getBuiltinVaListKind() const override {
@@ -384,6 +383,11 @@
return X86TargetInfo::validateOperandSize(Constraint, Size);
}
+ void setMaxAtomicWidth() override {
+ if (CPU >= CK_i586)
+ MaxAtomicInlineWidth = 64;
+ }
+
ArrayRef<Builtin::Info> getTargetBuiltins() const override;
};
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